Commit 9dcdeade authored by swift_gan's avatar swift_gan Committed by swift_gan

tweak code

parent aebe7002
...@@ -9,9 +9,14 @@ using namespace SandHook::Asm; ...@@ -9,9 +9,14 @@ using namespace SandHook::Asm;
//PC Rel Inst //PC Rel Inst
A64_INST_PC_REL::A64_INST_PC_REL() {}
A64_INST_PC_REL::A64_INST_PC_REL(aarch64_pcrel_insts *inst) : InstructionA64(inst) {}
int A64_INST_PC_REL::getImmPCRel() { int A64_INST_PC_REL::getImmPCRel() {
U32 hi = static_cast<U32>(get().immhi); U32 hi = static_cast<U32>(get()->immhi);
U32 lo = get().immlo; U32 lo = get()->immlo;
U32 offset = (hi << IMM_LO_W) | lo; U32 offset = (hi << IMM_LO_W) | lo;
int width = IMM_HI_W + IMM_LO_W; int width = IMM_HI_W + IMM_LO_W;
return ExtractSignedBitfield32(width - 1, 0, offset); return ExtractSignedBitfield32(width - 1, 0, offset);
...@@ -28,6 +33,11 @@ ADDR A64_INST_PC_REL::getImmPCOffsetTarget() { ...@@ -28,6 +33,11 @@ ADDR A64_INST_PC_REL::getImmPCOffsetTarget() {
//ADR ADRP //ADR ADRP
A64_ADR_ADRP::A64_ADR_ADRP() {}
A64_ADR_ADRP::A64_ADR_ADRP(aarch64_pcrel_insts *inst) : A64_INST_PC_REL(inst) {}
ADDR A64_ADR_ADRP::getImmPCOffset() { ADDR A64_ADR_ADRP::getImmPCOffset() {
ADDR offset = static_cast<ADDR>(getImmPCRel()); ADDR offset = static_cast<ADDR>(getImmPCRel());
if (isADRP()) { if (isADRP()) {
...@@ -44,3 +54,4 @@ ADDR A64_ADR_ADRP::getImmPCOffsetTarget() { ...@@ -44,3 +54,4 @@ ADDR A64_ADR_ADRP::getImmPCOffsetTarget() {
int A64_ADR_ADRP::getImm() { int A64_ADR_ADRP::getImm() {
return getImmPCRel(); return getImmPCRel();
} }
...@@ -17,23 +17,27 @@ namespace SandHook { ...@@ -17,23 +17,27 @@ namespace SandHook {
class InstructionA64 : public Instruction<InstStruct> { class InstructionA64 : public Instruction<InstStruct> {
public: public:
inline InstStruct mask(InstStruct raw) { InstructionA64() {}
return raw & (InstStruct) *this;
InstructionA64(InstStruct *inst) : Instruction<InstStruct>(inst) {}
InstStruct mask(InstStruct raw) {
return raw & *(this->get());
} }
inline bool IsPCRelAddressing() { bool IsPCRelAddressing() {
return mask(PCRelAddressingFMask) == PCRelAddressingFixed; return mask(PCRelAddressingFMask) == PCRelAddressingFixed;
} }
inline InstType instType() override { InstType instType() {
return A64; return A64;
} }
inline Arch arch() override { Arch arch() {
return arm64; return arm64;
} }
int getImmBranch() { virtual int getImmBranch() {
//TODO //TODO
return 0; return 0;
} }
...@@ -43,19 +47,27 @@ namespace SandHook { ...@@ -43,19 +47,27 @@ namespace SandHook {
class A64_INST_PC_REL : public InstructionA64<aarch64_pcrel_insts> { class A64_INST_PC_REL : public InstructionA64<aarch64_pcrel_insts> {
public: public:
int getImmPCRel(); A64_INST_PC_REL();
ADDR getImmPCOffset(); A64_INST_PC_REL(aarch64_pcrel_insts *inst);
ADDR getImmPCOffsetTarget(); virtual int getImmPCRel();
virtual ADDR getImmPCOffset();
virtual ADDR getImmPCOffsetTarget();
}; };
class A64_ADR_ADRP : public A64_INST_PC_REL { class A64_ADR_ADRP : public A64_INST_PC_REL {
public: public:
A64_ADR_ADRP();
A64_ADR_ADRP(aarch64_pcrel_insts *inst);
inline bool isADRP() { inline bool isADRP() {
return get().op == 1; return get()->op == 1;
} }
ADDR getImmPCOffset(); ADDR getImmPCOffset();
......
...@@ -8,6 +8,38 @@ ...@@ -8,6 +8,38 @@
#include "../../asm/instruction.h" #include "../../asm/instruction.h"
enum InstructionFields {
// Registers.
kRdShift = 0,
kRdBits = 5,
kRnShift = 5,
kRnBits = 5,
kRaShift = 10,
kRaBits = 5,
kRmShift = 16,
kRmBits = 5,
kRtShift = 0,
kRtBits = 5,
kRt2Shift = 10,
kRt2Bits = 5,
kRsShift = 16,
kRsBits = 5,
};
// Generic fields.
enum GenericInstrField {
SixtyFourBits = 0x80000000,
ThirtyTwoBits = 0x00000000,
FPTypeMask = 0x00C00000,
FP16 = 0x00C00000,
FP32 = 0x00000000,
FP64 = 0x00400000
};
enum PCRelAddressingOp { enum PCRelAddressingOp {
PCRelAddressingFixed = 0x10000000, PCRelAddressingFixed = 0x10000000,
...@@ -17,6 +49,23 @@ enum PCRelAddressingOp { ...@@ -17,6 +49,23 @@ enum PCRelAddressingOp {
ADRP = PCRelAddressingFixed | 0x80000000 ADRP = PCRelAddressingFixed | 0x80000000
}; };
// Move wide immediate.
enum MoveWideImmediateOp {
MoveWideImmediateFixed = 0x12800000,
MoveWideImmediateFMask = 0x1F800000,
MoveWideImmediateMask = 0xFF800000,
MOVN = 0x00000000,
MOVZ = 0x40000000,
MOVK = 0x60000000,
MOVN_w = MoveWideImmediateFixed | MOVN,
MOVN_x = MoveWideImmediateFixed | MOVN | SixtyFourBits,
MOVZ_w = MoveWideImmediateFixed | MOVZ,
MOVZ_x = MoveWideImmediateFixed | MOVZ | SixtyFourBits,
MOVK_w = MoveWideImmediateFixed | MOVK,
MOVK_x = MoveWideImmediateFixed | MOVK | SixtyFourBits
};
enum ImmBranchType { enum ImmBranchType {
UnknownBranchType = 0, UnknownBranchType = 0,
CondBranchType = 1, CondBranchType = 1,
......
...@@ -5,6 +5,7 @@ ...@@ -5,6 +5,7 @@
#ifndef SANDHOOK_INSTRUCTION_H #ifndef SANDHOOK_INSTRUCTION_H
#define SANDHOOK_INSTRUCTION_H #define SANDHOOK_INSTRUCTION_H
#include <malloc.h>
#include "../includes/base.h" #include "../includes/base.h"
typedef U32 InstA64; typedef U32 InstA64;
...@@ -20,54 +21,88 @@ namespace SandHook { ...@@ -20,54 +21,88 @@ namespace SandHook {
namespace Asm { namespace Asm {
template <typename Raw> template <typename Raw>
class Instruction { class Unit {
public: public:
inline void* getPC() const { Unit() {
return (void *) this; raw = reinterpret_cast<Raw*>(malloc(sizeof(Raw)));
auto_alloc = true;
} }
virtual InstType instType() { Unit<Raw>(Raw *raw) : raw(raw) {}
return unkownInst;
Unit<Raw>(Raw raw) {
Unit();
*this->raw = raw;
} }
virtual Arch arch() { inline void* getPC() const {
return unkownArch; return raw;
} }
bool pcRelate() { Raw* get() const {
return false; return raw;
} }
Raw get() { void set(Raw raw) const {
return *reinterpret_cast<Raw*>(this); *this->raw = raw;
} }
void set(Raw raw) { inline void copy(void* dest) {
*this = raw; memcpy(dest, getPC(), size());
} }
U8 size() { virtual U8 size() {
return sizeof(Raw); return sizeof(Raw);
} }
bool operator&(const Instruction &rhs) { virtual ~Unit() {
return rhs == *this; if (auto_alloc) {
free(raw);
} }
bool operator==(const Instruction &rhs) {
return rhs == *this;
} }
bool operator!=(const Instruction &rhs) { private:
return !(rhs == *this); Raw* raw;
bool auto_alloc = false;
};
template <typename Inst>
class Instruction : public Unit<Inst> {
public:
Instruction() {}
Instruction(Inst *inst) : Unit<Inst>(inst) {}
virtual InstType instType() {
return unkownInst;
} }
virtual ~Instruction() { virtual Arch arch() {
return unkownArch;
}
virtual bool pcRelate() {
return false;
} }
}; };
class Data16 : public Unit<U16> {
public:
Data16(U16 raw) : Unit(raw) {}
};
class Data32 : public Unit<U32> {
public:
Data32(U32 raw) : Unit(raw) {}
};
class Data64 : public Unit<U64> {
public:
Data64(U64 raw) : Unit(raw) {}
};
} }
} }
......
//
// Created by swift on 2019/5/7.
//
#ifndef SANDHOOK_NH_ASSEMBLER_H
#define SANDHOOK_NH_ASSEMBLER_H
namespace SandHook {
namespace Assembler {
class Assembler {
};
class CodeBuffer {
};
}
}
#endif //SANDHOOK_NH_ASSEMBLER_H
...@@ -133,10 +133,7 @@ V(57) V(58) V(59) V(60) V(61) V(62) V(63) ...@@ -133,10 +133,7 @@ V(57) V(58) V(59) V(60) V(61) V(62) V(63)
return TruncateToUint##N(x); \ return TruncateToUint##N(x); \
} }
INT_1_TO_32_LIST(DECLARE_TRUNCATE_TO_UINT_32) INT_1_TO_32_LIST(DECLARE_TRUNCATE_TO_UINT_32)
#undef DECLARE_TRUNCATE_TO_INT_N #undef DECLARE_TRUNCATE_TO_INT_N
// Bit field extraction. // Bit field extraction.
...@@ -164,4 +161,21 @@ inline int32_t ExtractSignedBitfield32(int msb, int lsb, int32_t x) { ...@@ -164,4 +161,21 @@ inline int32_t ExtractSignedBitfield32(int msb, int lsb, int32_t x) {
return result; return result;
} }
static inline int16_t BITS16L(int32_t value) {
return static_cast<int16_t>(value);
}
static inline int16_t BITS16H(int32_t value) {
return static_cast<int16_t>(value >> 16);
}
static inline int32_t BITS32L(int64_t value) {
return static_cast<int32_t>(value);
}
static inline int32_t BITS32H(int64_t value) {
return static_cast<int32_t>(value >> 32);
}
#endif //SANDHOOK_BASE_H #endif //SANDHOOK_BASE_H
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