Commit c2a9a03f authored by swift_gan's avatar swift_gan Committed by swift_gan

[Reconstitution]fix 32bit

parent 21256c16
...@@ -17,7 +17,7 @@ android { ...@@ -17,7 +17,7 @@ android {
cmake { cmake {
arguments '-DBUILD_TESTING=OFF' arguments '-DBUILD_TESTING=OFF'
cppFlags "-frtti -fexceptions -Wpointer-arith" cppFlags "-frtti -fexceptions -Wpointer-arith"
abiFilters 'arm64-v8a' abiFilters 'armeabi-v7a', 'arm64-v8a'
} }
} }
} }
......
...@@ -62,23 +62,23 @@ void AssemblerA32::Ldr(RegisterA32 &rt, Off offset) { ...@@ -62,23 +62,23 @@ void AssemblerA32::Ldr(RegisterA32 &rt, Off offset) {
} }
void AssemblerA32::Ldr(RegisterA32 &rt, Label *label) { void AssemblerA32::Ldr(RegisterA32 &rt, Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDR, INST_T32(LDR_LIT)::UnSign, rt, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDR, INST_T32(LDR_LIT)::UnSign, rt, label)));
} }
void AssemblerA32::Ldrb(RegisterA32 &rt, Label *label) { void AssemblerA32::Ldrb(RegisterA32 &rt, Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRB, INST_T32(LDR_LIT)::UnSign,rt, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRB, INST_T32(LDR_LIT)::UnSign,rt, label)));
} }
void AssemblerA32::Ldrh(RegisterA32 &rt, Label *label) { void AssemblerA32::Ldrh(RegisterA32 &rt, Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRH, INST_T32(LDR_LIT)::UnSign,rt, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRH, INST_T32(LDR_LIT)::UnSign,rt, label)));
} }
void AssemblerA32::Ldrsb(RegisterA32 &rt, Label *label) { void AssemblerA32::Ldrsb(RegisterA32 &rt, Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRB, INST_T32(LDR_LIT)::Sign,rt, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRB, INST_T32(LDR_LIT)::Sign,rt, label)));
} }
void AssemblerA32::Ldrsh(RegisterA32 &rt, Label *label) { void AssemblerA32::Ldrsh(RegisterA32 &rt, Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRH, INST_T32(LDR_LIT)::Sign,rt, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(LDR_LIT)(INST_T32(LDR_LIT)::LDRH, INST_T32(LDR_LIT)::Sign,rt, label)));
} }
void AssemblerA32::Ldr(RegisterA32 &rt, const MemOperand &operand) { void AssemblerA32::Ldr(RegisterA32 &rt, const MemOperand &operand) {
...@@ -106,19 +106,19 @@ void AssemblerA32::Ldrsh(RegisterA32 &rt, const MemOperand &operand) { ...@@ -106,19 +106,19 @@ void AssemblerA32::Ldrsh(RegisterA32 &rt, const MemOperand &operand) {
} }
void AssemblerA32::B(Label *label) { void AssemblerA32::B(Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(B)(*label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(B)(label)));
} }
void AssemblerA32::Bl(Label *label) { void AssemblerA32::Bl(Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(B32)(INST_T32(B32)::BL, INST_T32(B32)::arm, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(B32)(INST_T32(B32)::BL, INST_T32(B32)::arm, label)));
} }
void AssemblerA32::Blx(Label *label) { void AssemblerA32::Blx(Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(B32)(INST_T32(B32)::BL, INST_T32(B32)::thumb, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(B32)(INST_T32(B32)::BL, INST_T32(B32)::thumb, label)));
} }
void AssemblerA32::Bx(Label *label) { void AssemblerA32::Bx(Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(B32)(INST_T32(B32)::B, INST_T32(B32)::thumb, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T32(B32)(INST_T32(B32)::B, INST_T32(B32)::thumb, label)));
} }
void AssemblerA32::Mov(RegisterA32 &rd, RegisterA32 &rm) { void AssemblerA32::Mov(RegisterA32 &rd, RegisterA32 &rm) {
...@@ -134,7 +134,7 @@ void AssemblerA32::Blx(RegisterA32 &rm) { ...@@ -134,7 +134,7 @@ void AssemblerA32::Blx(RegisterA32 &rm) {
} }
void AssemblerA32::B(Condition condition, Label* label) { void AssemblerA32::B(Condition condition, Label* label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(B_COND)(condition, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(B_COND)(condition, label)));
} }
void AssemblerA32::Add(RegisterA32 &rdn, U8 imm8) { void AssemblerA32::Add(RegisterA32 &rdn, U8 imm8) {
...@@ -170,7 +170,7 @@ void AssemblerA32::Push(RegisterA32 &rt) { ...@@ -170,7 +170,7 @@ void AssemblerA32::Push(RegisterA32 &rt) {
} }
void AssemblerA32::Adr(RegisterA32 &rd, Label *label) { void AssemblerA32::Adr(RegisterA32 &rd, Label *label) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(ADR)(rd, *label))); Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(ADR)(rd, label)));
} }
void AssemblerA32::Nop16() { void AssemblerA32::Nop16() {
......
...@@ -11,8 +11,7 @@ using namespace SandHook::AsmA32; ...@@ -11,8 +11,7 @@ using namespace SandHook::AsmA32;
#define CASE(T, X) \ #define CASE(T, X) \
if (IS_OPCODE_##T(*reinterpret_cast<Inst##T *>(pc), X)) { \ if (IS_OPCODE_##T(*reinterpret_cast<Inst##T *>(pc), X)) { \
STRUCT_##T(X) *s = reinterpret_cast<STRUCT_##T(X) *>(pc); \ unit = reinterpret_cast<Unit<Base> *>(new INST_##T(X)(pc)); \
unit = reinterpret_cast<Unit<Base> *>(new INST_##T(X)(s)); \
goto label_matched; \ goto label_matched; \
} }
...@@ -25,15 +24,15 @@ Arm32Decoder* Arm32Decoder::instant = new Arm32Decoder(); ...@@ -25,15 +24,15 @@ Arm32Decoder* Arm32Decoder::instant = new Arm32Decoder();
void Arm32Decoder::Disassembler(void *codeStart, Addr codeLen, InstVisitor &visitor, void Arm32Decoder::Disassembler(void *codeStart, Addr codeLen, InstVisitor &visitor,
bool onlyPcRelInst) { bool onlyPcRelInst) {
bool thumb = isThumbCode(reinterpret_cast<Addr>(codeStart)); bool thumb = IsThumbCode(reinterpret_cast<Addr>(codeStart));
if (thumb) { if (thumb) {
codeStart = getThumbCodeAddress(codeStart); codeStart = GetThumbCodeAddress(codeStart);
} }
void *pc = codeStart; void *pc = codeStart;
Addr endAddr = (Addr) codeStart + codeLen; Addr endAddr = (Addr) codeStart + codeLen;
Unit<Base>* unit = nullptr; Unit<Base>* unit = nullptr;
while((Addr) pc < endAddr) { while((Addr) pc < endAddr) {
bool thumb32 = isThumb32(*reinterpret_cast<InstT16*>(pc)); bool thumb32 = IsThumb32(*reinterpret_cast<InstT16 *>(pc));
if (thumb && thumb32) { if (thumb && thumb32) {
CASE_T32(SUB_IMM) CASE_T32(SUB_IMM)
CASE_T32(B32) CASE_T32(B32)
...@@ -44,7 +43,7 @@ void Arm32Decoder::Disassembler(void *codeStart, Addr codeLen, InstVisitor &visi ...@@ -44,7 +43,7 @@ void Arm32Decoder::Disassembler(void *codeStart, Addr codeLen, InstVisitor &visi
CASE_T32(MOV_MOVT_IMM) CASE_T32(MOV_MOVT_IMM)
} }
if (unit == nullptr) { if (unit == nullptr) {
unit = reinterpret_cast<Unit<Base> *>(new INST_T32(UNKNOW)(*reinterpret_cast<STRUCT_T32(UNKNOW) *>(pc))); unit = reinterpret_cast<Unit<Base> *>(new INST_T32(UNKNOW)(pc));
} }
} else if (thumb) { } else if (thumb) {
CASE_T16(B) CASE_T16(B)
...@@ -64,15 +63,15 @@ void Arm32Decoder::Disassembler(void *codeStart, Addr codeLen, InstVisitor &visi ...@@ -64,15 +63,15 @@ void Arm32Decoder::Disassembler(void *codeStart, Addr codeLen, InstVisitor &visi
CASE_T16(PUSH) CASE_T16(PUSH)
} }
if (unit == nullptr) { if (unit == nullptr) {
unit = reinterpret_cast<Unit<Base> *>(new INST_T16(UNKNOW)(*reinterpret_cast<STRUCT_T16(UNKNOW) *>(pc))); unit = reinterpret_cast<Unit<Base> *>(new INST_T16(UNKNOW)(pc));
} }
} else { } else {
//TODO arm32 support //TODO arm32 support
unit = reinterpret_cast<Unit<Base> *>(new INST_T32(UNKNOW)(*reinterpret_cast<STRUCT_T32(UNKNOW) *>(pc))); unit = reinterpret_cast<Unit<Base> *>(new INST_T32(UNKNOW)(pc));
} }
label_matched: label_matched:
if (!visitor.visit(unit, pc)) { if (!visitor.Visit(unit, pc)) {
break; break;
} }
pc = reinterpret_cast<InstA64 *>((Addr)pc + unit->Size()); pc = reinterpret_cast<InstA64 *>((Addr)pc + unit->Size());
......
...@@ -17,18 +17,18 @@ using namespace SandHook::Utils; ...@@ -17,18 +17,18 @@ using namespace SandHook::Utils;
#include "assembler_arm32.h" #include "assembler_arm32.h"
using namespace SandHook::RegistersA32; using namespace SandHook::RegistersA32;
void *InlineHookArm32Android::InlineHook(void *origin, void *replace) { void *InlineHookArm32Android::Hook(void *origin, void *replace) {
AutoLock lock(hookLock); AutoLock lock(hookLock);
void* originCode; void* originCode;
if (isThumbCode((Addr)origin)) { if (IsThumbCode((Addr) origin)) {
originCode = getThumbCodeAddress(origin); originCode = GetThumbCodeAddress(origin);
} else { } else {
LOGE("hook %d error!, only support thumb2 now!", origin); LOGE("hook %d error!, only support thumb2 now!", origin);
return nullptr; return nullptr;
} }
bool changeMode = isThumbCode((Addr) origin) != isThumbCode((Addr) replace); bool changeMode = IsThumbCode((Addr) origin) != IsThumbCode((Addr) replace);
void* backup = nullptr; void* backup = nullptr;
AssemblerA32 assemblerBackup(backupBuffer); AssemblerA32 assemblerBackup(backupBuffer);
...@@ -60,13 +60,14 @@ void *InlineHookArm32Android::InlineHook(void *origin, void *replace) { ...@@ -60,13 +60,14 @@ void *InlineHookArm32Android::InlineHook(void *origin, void *replace) {
ALIGN_FOR_LDR ALIGN_FOR_LDR
__ Ldr(PC, origin_addr_label); __ Ldr(PC, origin_addr_label);
__ Emit(origin_addr_label); __ Emit(origin_addr_label);
__ Emit((Addr) getThumbPC(reinterpret_cast<void *>(reinterpret_cast<Addr>(originCode) + relocate.curOffset))); __ Emit((Addr) GetThumbPC(
reinterpret_cast<void *>(reinterpret_cast<Addr>(originCode) + relocate.curOffset)));
__ finish(); __ finish();
#undef __ #undef __
//commit inline trampoline //commit inline trampoline
assemblerInline.finish(); assemblerInline.finish();
return getThumbPC(backup); return GetThumbPC(backup);
} }
...@@ -77,14 +78,14 @@ bool InlineHookArm32Android::BreakPoint(void *origin, void (*callback)(REG *)) { ...@@ -77,14 +78,14 @@ bool InlineHookArm32Android::BreakPoint(void *origin, void (*callback)(REG *)) {
AutoLock lock(hookLock); AutoLock lock(hookLock);
void* originCode; void* originCode;
if (isThumbCode((Addr)origin)) { if (IsThumbCode((Addr) origin)) {
originCode = getThumbCodeAddress(origin); originCode = GetThumbCodeAddress(origin);
} else { } else {
LOGE("hook %d error!, only support thumb2 now!", origin); LOGE("hook %d error!, only support thumb2 now!", origin);
return false; return false;
} }
bool changeMode = isThumbCode((Addr) origin) != isThumbCode((Addr) callback); bool changeMode = IsThumbCode((Addr) origin) != IsThumbCode((Addr) callback);
void* backup = nullptr; void* backup = nullptr;
AssemblerA32 assemblerBackup(backupBuffer); AssemblerA32 assemblerBackup(backupBuffer);
...@@ -100,12 +101,13 @@ bool InlineHookArm32Android::BreakPoint(void *origin, void (*callback)(REG *)) { ...@@ -100,12 +101,13 @@ bool InlineHookArm32Android::BreakPoint(void *origin, void (*callback)(REG *)) {
ALIGN_FOR_LDR ALIGN_FOR_LDR
__ Ldr(PC, origin_addr_label); __ Ldr(PC, origin_addr_label);
__ Emit(origin_addr_label); __ Emit(origin_addr_label);
__ Emit((Addr) getThumbPC(reinterpret_cast<void *>(reinterpret_cast<Addr>(originCode) + relocate.curOffset))); __ Emit((Addr) GetThumbPC(
reinterpret_cast<void *>(reinterpret_cast<Addr>(originCode) + relocate.curOffset)));
__ finish(); __ finish();
#undef __ #undef __
//build trampoline //build trampoline
origin_addr_s = (Addr) getThumbPC(backup); origin_addr_s = (Addr) GetThumbPC(backup);
callback_addr_s = (Addr) callback; callback_addr_s = (Addr) callback;
void* trampoline = backupBuffer->copy((void*)BP_SHELLCODE, SHELLCODE_LEN(BP_SHELLCODE)); void* trampoline = backupBuffer->copy((void*)BP_SHELLCODE, SHELLCODE_LEN(BP_SHELLCODE));
......
...@@ -2,8 +2,7 @@ ...@@ -2,8 +2,7 @@
// Created by swift on 2019/5/23. // Created by swift on 2019/5/23.
// //
#ifndef SANDHOOK_HOOK_ARM32_H #pragma once
#define SANDHOOK_HOOK_ARM32_H
#include "hook.h" #include "hook.h"
...@@ -18,7 +17,7 @@ namespace SandHook { ...@@ -18,7 +17,7 @@ namespace SandHook {
inline ~InlineHookArm32Android() { inline ~InlineHookArm32Android() {
delete hookLock; delete hookLock;
} }
void *InlineHook(void *origin, void *replace) override; void *Hook(void *origin, void *replace) override;
bool BreakPoint(void *point, void (*callback)(REG *)) override; bool BreakPoint(void *point, void (*callback)(REG *)) override;
...@@ -27,6 +26,4 @@ namespace SandHook { ...@@ -27,6 +26,4 @@ namespace SandHook {
}; };
} }
} }
\ No newline at end of file
#endif //SANDHOOK_HOOK_ARM32_H
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
#define DECODE_OFFSET(bits, ext) SignExtend32(bits + ext, COMBINE(Get()->imm##bits, 0, ext)) #define DECODE_OFFSET(bits, ext) SignExtend32(bits + ext, COMBINE(Get()->imm##bits, 0, ext))
#define ENCODE_OFFSET(bits, ext) Get()->imm##bits = TruncateToUint##bits(offset >> ext) #define ENCODE_OFFSET(bits, ext) Get()->imm##bits = TruncateToUint##bits(offset >> ext)
#define CODE_OFFSET(I) I->offset + (I->instType() == A32 ? 2 * 4 : 2 * 2) #define CODE_OFFSET(I) I->offset + (I->InstType() == A32 ? 2 * 4 : 2 * 2)
using namespace SandHook::RegistersA32; using namespace SandHook::RegistersA32;
...@@ -143,20 +143,20 @@ namespace SandHook { ...@@ -143,20 +143,20 @@ namespace SandHook {
return (registers.GetList() >> first) & ((1 << count) - 1); return (registers.GetList() >> first) & ((1 << count) - 1);
} }
inline bool isThumbCode(Addr codeAddr) { inline bool IsThumbCode(Addr codeAddr) {
return (codeAddr & 0x1) == 0x1; return (codeAddr & 0x1) == 0x1;
} }
inline bool isThumb32(InstT16 code) { inline bool IsThumb32(InstT16 code) {
return ((code & 0xF000) == 0xF000) || ((code & 0xF800) == 0xE800); return ((code & 0xF000) == 0xF000) || ((code & 0xF800) == 0xE800);
} }
inline void* getThumbCodeAddress(void* code) { inline void* GetThumbCodeAddress(void *code) {
Addr addr = reinterpret_cast<Addr>(code) & (~0x1); Addr addr = reinterpret_cast<Addr>(code) & (~0x1);
return reinterpret_cast<void*>(addr); return reinterpret_cast<void*>(addr);
} }
inline void* getThumbPC(void* code) { inline void* GetThumbPC(void *code) {
Addr addr = reinterpret_cast<Addr>(code) & (~0x1); Addr addr = reinterpret_cast<Addr>(code) & (~0x1);
return reinterpret_cast<void*>(addr + 1); return reinterpret_cast<void*>(addr + 1);
} }
......
...@@ -17,28 +17,17 @@ using namespace SandHook::RegistersA32; ...@@ -17,28 +17,17 @@ using namespace SandHook::RegistersA32;
//Unknow //Unknow
T16_UNKNOW::T16_UNKNOW(STRUCT_T16(UNKNOW) &inst) : InstructionT16(&inst) { T16_UNKNOW::T16_UNKNOW(void *inst) : InstructionT16(&inst) {
Disassembler(&inst);
}
void T16_UNKNOW::Disassembler(T16_STRUCT_UNKNOW *inst) {
inst_backup = *inst;
}
void T16_UNKNOW::Assembler() {
Set(inst_backup);
} }
//B //B
T16_B::T16_B() {}
T16_B::T16_B(T16_STRUCT_B *inst) : T16_INST_PC_REL(inst) { T16_B::T16_B(void *inst) : T16_INST_PC_REL(inst) {
Disassembler(inst);
} }
T16_B::T16_B(Off offset) : offset(offset) {} T16_B::T16_B(Off offset) : offset(offset) {}
T16_B::T16_B(Label &label) { T16_B::T16_B(Label *label) {
BindLabel(label); BindLabel(label);
} }
...@@ -46,7 +35,7 @@ Off T16_B::GetImmPCOffset() { ...@@ -46,7 +35,7 @@ Off T16_B::GetImmPCOffset() {
return DECODE_OFFSET(11, 1); return DECODE_OFFSET(11, 1);
} }
void T16_B::Disassembler(T16_STRUCT_B *inst) { void T16_B::Disassembler() {
offset = GetImmPCOffset(); offset = GetImmPCOffset();
} }
...@@ -63,19 +52,17 @@ void T16_B::OnOffsetApply(Off offset) { ...@@ -63,19 +52,17 @@ void T16_B::OnOffsetApply(Off offset) {
//B Cond //B Cond
T16_B_COND::T16_B_COND() {}
T16_B_COND::T16_B_COND(STRUCT_T16(B_COND) *inst) : T16_INST_PC_REL(inst) { T16_B_COND::T16_B_COND(void *inst) : T16_INST_PC_REL(inst) {
Disassembler(inst);
} }
T16_B_COND::T16_B_COND(Condition condition, Off offset) : condition(condition), offset(offset) {} T16_B_COND::T16_B_COND(Condition condition, Off offset) : condition(condition), offset(offset) {}
T16_B_COND::T16_B_COND(Condition condition, Label &label) { T16_B_COND::T16_B_COND(Condition condition, Label *label) {
BindLabel(label); BindLabel(label);
} }
void T16_B_COND::Disassembler(STRUCT_T16(B_COND) *inst) { void T16_B_COND::Disassembler() {
DECODE_COND; DECODE_COND;
offset = GetImmPCOffset(); offset = GetImmPCOffset();
} }
...@@ -96,15 +83,13 @@ Off T16_B_COND::GetImmPCOffset() { ...@@ -96,15 +83,13 @@ Off T16_B_COND::GetImmPCOffset() {
} }
//BX BLX //BX BLX
T16_BX_BLX::T16_BX_BLX(T16_BX_BLX::OP op, RegisterA32 &rm) : op(op), rm(&rm) {}
T16_BX_BLX::T16_BX_BLX(T16_STRUCT_BX_BLX *inst) : T16_INST_PC_REL(inst) { T16_BX_BLX::T16_BX_BLX(void *inst) : T16_INST_PC_REL(inst) {}
Disassembler(inst);
}
void T16_BX_BLX::Disassembler(STRUCT_T16(BX_BLX) *inst) { T16_BX_BLX::T16_BX_BLX(T16_BX_BLX::OP op, RegisterA32 &rm) : op(op), rm(&rm) {}
void T16_BX_BLX::Disassembler() {
DECODE_OP; DECODE_OP;
DECODE_RM(Reg); DECODE_RM(Reg);
} }
...@@ -118,26 +103,20 @@ void T16_BX_BLX::Assembler() { ...@@ -118,26 +103,20 @@ void T16_BX_BLX::Assembler() {
//CBZ CBNZ //CBZ CBNZ
T16_CBZ_CBNZ::T16_CBZ_CBNZ(T16_STRUCT_CBZ_CBNZ *inst) : T16_INST_PC_REL(inst) { T16_CBZ_CBNZ::T16_CBZ_CBNZ(void *inst) : T16_INST_PC_REL(inst) {}
Disassembler(inst);
}
T16_CBZ_CBNZ::T16_CBZ_CBNZ(T16_CBZ_CBNZ::OP op, Off offset, RegisterA32 &rn) : op(op), offset(offset), T16_CBZ_CBNZ::T16_CBZ_CBNZ(T16_CBZ_CBNZ::OP op, Off offset, RegisterA32 &rn) : op(op), offset(offset),
rn(&rn) {} rn(&rn) {}
T16_CBZ_CBNZ::T16_CBZ_CBNZ(T16_CBZ_CBNZ::OP op, Label* label, RegisterA32 &rn) : op(op), rn(&rn) {
T16_CBZ_CBNZ::T16_CBZ_CBNZ(T16_CBZ_CBNZ::OP op, Label& label, RegisterA32 &rn) : op(op),
rn(&rn) {
BindLabel(label); BindLabel(label);
} }
Off T16_CBZ_CBNZ::GetImmPCOffset() { Off T16_CBZ_CBNZ::GetImmPCOffset() {
return COMBINE(Get()->i, Get()->imm5, 5) << 2; return COMBINE(Get()->i, Get()->imm5, 5) << 2;
} }
void T16_CBZ_CBNZ::Disassembler(T16_STRUCT_CBZ_CBNZ *inst) { void T16_CBZ_CBNZ::Disassembler() {
offset = GetImmPCOffset(); offset = GetImmPCOffset();
DECODE_RN(Reg); DECODE_RN(Reg);
DECODE_OP; DECODE_OP;
...@@ -159,20 +138,16 @@ void T16_CBZ_CBNZ::OnOffsetApply(Off offset) { ...@@ -159,20 +138,16 @@ void T16_CBZ_CBNZ::OnOffsetApply(Off offset) {
//LDR_LIT //LDR_LIT
T16_LDR_LIT::T16_LDR_LIT(T16_STRUCT_LDR_LIT *inst) : T16_INST_PC_REL(inst) { T16_LDR_LIT::T16_LDR_LIT(void *inst) : T16_INST_PC_REL(inst) {}
Disassembler(inst);
}
T16_LDR_LIT::T16_LDR_LIT(Off offset, RegisterA32 &rt) : offset(offset), rt(&rt) { T16_LDR_LIT::T16_LDR_LIT(Off offset, RegisterA32 &rt) : offset(offset), rt(&rt) {}
}
Off T16_LDR_LIT::GetImmPCOffset() { Off T16_LDR_LIT::GetImmPCOffset() {
return Get()->imm8 << 2; return Get()->imm8 << 2;
} }
Addr T16_LDR_LIT::GetImmPCOffsetTarget() { Addr T16_LDR_LIT::GetImmPCOffsetTarget() {
return ALIGN((Addr) getPC() + offset, 4); return ALIGN((Addr) GetPC() + offset, 4);
} }
void T16_LDR_LIT::OnOffsetApply(Off offset) { void T16_LDR_LIT::OnOffsetApply(Off offset) {
...@@ -180,7 +155,7 @@ void T16_LDR_LIT::OnOffsetApply(Off offset) { ...@@ -180,7 +155,7 @@ void T16_LDR_LIT::OnOffsetApply(Off offset) {
ENCODE_OFFSET(8, 2); ENCODE_OFFSET(8, 2);
} }
void T16_LDR_LIT::Disassembler(T16_STRUCT_LDR_LIT *inst) { void T16_LDR_LIT::Disassembler() {
DECODE_RT(Reg); DECODE_RT(Reg);
offset = GetImmPCOffset(); offset = GetImmPCOffset();
} }
...@@ -193,17 +168,15 @@ void T16_LDR_LIT::Assembler() { ...@@ -193,17 +168,15 @@ void T16_LDR_LIT::Assembler() {
//ADD IMM RD = RN //ADD IMM RD = RN
T16_ADD_IMM_RDN::T16_ADD_IMM_RDN(T16_STRUCT_ADD_IMM_RDN *inst) : InstructionT16(inst) { T16_ADD_IMM_RDN::T16_ADD_IMM_RDN(void *inst) : InstructionT16(inst) {}
Disassembler(inst);
}
T16_ADD_IMM_RDN::T16_ADD_IMM_RDN(RegisterA32 *rdn, U8 imm8) : rdn(rdn), imm8(imm8) {} T16_ADD_IMM_RDN::T16_ADD_IMM_RDN(RegisterA32 *rdn, U8 imm8) : rdn(rdn), imm8(imm8) {}
void T16_ADD_IMM_RDN::Disassembler(T16_STRUCT_ADD_IMM_RDN *inst) { void T16_ADD_IMM_RDN::Disassembler() {
rdn = Reg(inst->rdn); rdn = Reg(Get()->rdn);
imm8 = inst->imm8; imm8 = Get()->imm8;
} }
void T16_ADD_IMM_RDN::Assembler() { void T16_ADD_IMM_RDN::Assembler() {
...@@ -216,13 +189,11 @@ void T16_ADD_IMM_RDN::Assembler() { ...@@ -216,13 +189,11 @@ void T16_ADD_IMM_RDN::Assembler() {
//ADR //ADR
T16_ADR::T16_ADR(T16_STRUCT_ADR *inst) : T16_INST_PC_REL(inst) { T16_ADR::T16_ADR(void *inst) : T16_INST_PC_REL(inst) {}
Disassembler(inst);
}
T16_ADR::T16_ADR(RegisterA32 &rd, Off offset) : rd(&rd), offset(offset) {} T16_ADR::T16_ADR(RegisterA32 &rd, Off offset) : rd(&rd), offset(offset) {}
T16_ADR::T16_ADR(RegisterA32 &rd, Label &label) : rd(&rd) { T16_ADR::T16_ADR(RegisterA32 &rd, Label *label) : rd(&rd) {
BindLabel(label); BindLabel(label);
} }
...@@ -232,7 +203,7 @@ Off T16_ADR::GetImmPCOffset() { ...@@ -232,7 +203,7 @@ Off T16_ADR::GetImmPCOffset() {
} }
Addr T16_ADR::GetImmPCOffsetTarget() { Addr T16_ADR::GetImmPCOffsetTarget() {
return RoundDown((Addr) getPC() + offset, 4); return RoundDown((Addr) GetPC() + offset, 4);
} }
void T16_ADR::OnOffsetApply(Off offset) { void T16_ADR::OnOffsetApply(Off offset) {
...@@ -240,7 +211,7 @@ void T16_ADR::OnOffsetApply(Off offset) { ...@@ -240,7 +211,7 @@ void T16_ADR::OnOffsetApply(Off offset) {
Get()->imm8 = (U32)offset >> 2; Get()->imm8 = (U32)offset >> 2;
} }
void T16_ADR::Disassembler(T16_STRUCT_ADR *inst) { void T16_ADR::Disassembler() {
offset = GetImmPCOffset(); offset = GetImmPCOffset();
DECODE_RD(Reg); DECODE_RD(Reg);
} }
...@@ -252,16 +223,12 @@ void T16_ADR::Assembler() { ...@@ -252,16 +223,12 @@ void T16_ADR::Assembler() {
Get()->imm8 = (U32)offset >> 2; Get()->imm8 = (U32)offset >> 2;
} }
T16_CMP_REG::T16_CMP_REG() {}
T16_CMP_REG::T16_CMP_REG(T16_STRUCT_CMP_REG *inst) : InstructionT16(inst) {
Disassembler(inst);
}
T16_CMP_REG::T16_CMP_REG(void *inst) : InstructionT16(inst) {}
T16_CMP_REG::T16_CMP_REG(RegisterA32 &rm, RegisterA32 &rn) : rm(&rm), rn(&rn) {} T16_CMP_REG::T16_CMP_REG(RegisterA32 &rm, RegisterA32 &rn) : rm(&rm), rn(&rn) {}
void T16_CMP_REG::Disassembler(T16_STRUCT_CMP_REG *inst) { void T16_CMP_REG::Disassembler() {
DECODE_RM(Reg); DECODE_RM(Reg);
DECODE_RN(Reg); DECODE_RN(Reg);
} }
...@@ -274,19 +241,14 @@ void T16_CMP_REG::Assembler() { ...@@ -274,19 +241,14 @@ void T16_CMP_REG::Assembler() {
} }
//MOV REG //MOV REG
T16_MOV_REG::T16_MOV_REG(T16_STRUCT_MOV_REG *inst) : InstructionT16(inst) { T16_MOV_REG::T16_MOV_REG(void *inst) : InstructionT16(inst) {}
Disassembler(inst);
}
T16_MOV_REG::T16_MOV_REG(RegisterA32 &rd, RegisterA32 &rm) : rm(&rm), rd(&rd) {}
T16_MOV_REG::T16_MOV_REG(RegisterA32 &rd, RegisterA32 &rm) : rm(&rm), rd(&rd) { void T16_MOV_REG::Disassembler() {
}
void T16_MOV_REG::Disassembler(T16_STRUCT_MOV_REG *inst) {
DECODE_RM(Reg); DECODE_RM(Reg);
rd = Reg(static_cast<U8>(COMBINE(inst->D, inst->rd, 3))); rd = Reg(static_cast<U8>(COMBINE(Get()->D, Get()->rd, 3)));
} }
void T16_MOV_REG::Assembler() { void T16_MOV_REG::Assembler() {
...@@ -297,22 +259,19 @@ void T16_MOV_REG::Assembler() { ...@@ -297,22 +259,19 @@ void T16_MOV_REG::Assembler() {
Get()->D = BIT(rd->Code(), 3); Get()->D = BIT(rd->Code(), 3);
} }
bool T16_MOV_REG::pcRelate() { bool T16_MOV_REG::PcRelate() {
return rd == &PC || rm == &PC; return rd == &PC || rm == &PC;
} }
T16_ADD_REG::T16_ADD_REG() {}
T16_ADD_REG::T16_ADD_REG(T16_STRUCT_ADD_REG *inst) : InstructionT16(inst) { T16_ADD_REG::T16_ADD_REG(void *inst) : InstructionT16(inst) {}
Disassembler(inst);
}
T16_ADD_REG::T16_ADD_REG(RegisterA32 *rd, RegisterA32 *rn, RegisterA32 *rm) : rd(rd), rn(rn), T16_ADD_REG::T16_ADD_REG(RegisterA32 *rd, RegisterA32 *rn, RegisterA32 *rm) : rd(rd), rn(rn),
rm(rm) {} rm(rm) {}
void T16_ADD_REG::Disassembler(T16_STRUCT_ADD_REG *inst) { void T16_ADD_REG::Disassembler() {
DECODE_RD(Reg); DECODE_RD(Reg);
DECODE_RN(Reg); DECODE_RN(Reg);
DECODE_RM(Reg); DECODE_RM(Reg);
...@@ -330,14 +289,12 @@ void T16_ADD_REG::Assembler() { ...@@ -330,14 +289,12 @@ void T16_ADD_REG::Assembler() {
T16_CMP_REG_EXT::T16_CMP_REG_EXT(T16_STRUCT_CMP_REG_EXT *inst) : InstructionT16(inst) { T16_CMP_REG_EXT::T16_CMP_REG_EXT(void *inst) : InstructionT16(inst) {}
Disassembler(inst);
}
T16_CMP_REG_EXT::T16_CMP_REG_EXT(RegisterA32 &rn, RegisterA32 &rm) : rn(&rn), rm(&rm) {} T16_CMP_REG_EXT::T16_CMP_REG_EXT(RegisterA32 &rn, RegisterA32 &rm) : rn(&rn), rm(&rm) {}
void T16_CMP_REG_EXT::Disassembler(T16_STRUCT_CMP_REG_EXT *inst) { void T16_CMP_REG_EXT::Disassembler() {
rn = Reg(COMBINE(inst->N, inst->rn, 3)); rn = Reg(COMBINE(Get()->N, Get()->rn, 3));
DECODE_RM(Reg); DECODE_RM(Reg);
} }
...@@ -350,14 +307,12 @@ void T16_CMP_REG_EXT::Assembler() { ...@@ -350,14 +307,12 @@ void T16_CMP_REG_EXT::Assembler() {
//POP //POP
T16_POP::T16_POP(T16_STRUCT_POP *inst) : InstructionT16(inst) { T16_POP::T16_POP(void *inst) : InstructionT16(inst) {}
Disassembler(inst);
}
T16_POP::T16_POP(const RegisterList &registerList) : registerList(registerList) {} T16_POP::T16_POP(const RegisterList &registerList) : registerList(registerList) {}
void T16_POP::Disassembler(T16_STRUCT_POP *inst) { void T16_POP::Disassembler() {
registerList.SetList(COMBINE(inst->P << 7, inst->regs, 8)); registerList.SetList(COMBINE(Get()->P << 7, Get()->regs, 8));
} }
void T16_POP::Assembler() { void T16_POP::Assembler() {
...@@ -369,14 +324,12 @@ void T16_POP::Assembler() { ...@@ -369,14 +324,12 @@ void T16_POP::Assembler() {
//PUSH //PUSH
T16_PUSH::T16_PUSH(T16_STRUCT_PUSH *inst) : InstructionT16(inst) { T16_PUSH::T16_PUSH(void *inst) : InstructionT16(inst) {}
Disassembler(inst);
}
T16_PUSH::T16_PUSH(const RegisterList &registerList) : registerList(registerList) {} T16_PUSH::T16_PUSH(const RegisterList &registerList) : registerList(registerList) {}
void T16_PUSH::Disassembler(T16_STRUCT_PUSH *inst) { void T16_PUSH::Disassembler() {
registerList.SetList(COMBINE(inst->M << 6, inst->regs, 8)); registerList.SetList(COMBINE(Get()->M << 6, Get()->regs, 8));
} }
void T16_PUSH::Assembler() { void T16_PUSH::Assembler() {
...@@ -388,19 +341,17 @@ void T16_PUSH::Assembler() { ...@@ -388,19 +341,17 @@ void T16_PUSH::Assembler() {
// Add reg_ rdn T2 // Add reg_ rdn T2
T16_ADD_REG_RDN::T16_ADD_REG_RDN(T16_STRUCT_ADD_REG_RDN *inst) : InstructionT16(inst) { T16_ADD_REG_RDN::T16_ADD_REG_RDN(void *inst) : InstructionT16(inst) {}
Disassembler(inst);
}
T16_ADD_REG_RDN::T16_ADD_REG_RDN(RegisterA32 &rdn, RegisterA32 &rm) : rdn(&rdn), rm(&rm) {} T16_ADD_REG_RDN::T16_ADD_REG_RDN(RegisterA32 &rdn, RegisterA32 &rm) : rdn(&rdn), rm(&rm) {}
bool T16_ADD_REG_RDN::pcRelate() { bool T16_ADD_REG_RDN::PcRelate() {
return *rm == PC; return *rm == PC;
} }
void T16_ADD_REG_RDN::Disassembler(T16_STRUCT_ADD_REG_RDN *inst) { void T16_ADD_REG_RDN::Disassembler() {
DECODE_RM(Reg); DECODE_RM(Reg);
rdn = Reg(inst->rdn); rdn = Reg(Get()->rdn);
} }
void T16_ADD_REG_RDN::Assembler() { void T16_ADD_REG_RDN::Assembler() {
......
...@@ -32,10 +32,14 @@ return COND; \ ...@@ -32,10 +32,14 @@ return COND; \
#define TEST_INST_OPCODE(X, INDEX) inst_test.inst.opcode##INDEX == OPCODE_T16(X##_##INDEX) #define TEST_INST_OPCODE(X, INDEX) inst_test.inst.opcode##INDEX == OPCODE_T16(X##_##INDEX)
#define DEFINE_INST_CODE(X) \ #define DEFINE_INST(X) class INST_T16(X) : public InstructionT16<STRUCT_T16(X), ENUM_VALUE(InstCodeT16, InstCodeT16::X)>
inline U32 instCode() override { \
return ENUM_VALUE(InstCodeT16, InstCodeT16::X); \ #define DEFINE_INST_EXT(X,P) class INST_T16(X) : public INST_T16(P)
}
#define DEFINE_INST_EXT_(X,P) class INST_T16(X) : public P<STRUCT_T16(X), ENUM_VALUE(InstCodeT16, InstCodeT16::X)>
#define DEFINE_INST_PCREL(X) class INST_T16(X) : public T16_INST_PC_REL<STRUCT_T16(X), ENUM_VALUE(InstCodeT16, InstCodeT16::X)>
using namespace SandHook::RegistersA32; using namespace SandHook::RegistersA32;
...@@ -51,23 +55,23 @@ namespace SandHook { ...@@ -51,23 +55,23 @@ namespace SandHook {
InstructionT16(void *inst) : Instruction<S,C>(inst) {} InstructionT16(void *inst) : Instruction<S,C>(inst) {}
INLINE U32 Size() override { inline U32 Size() override {
return 2; return 2;
} }
INLINE void *GetPC() override { inline void *GetPC() override {
return reinterpret_cast<void *>((Addr) Instruction<S,C>::GetPC() + 2 * 2); return reinterpret_cast<void *>((Addr) Instruction<S,C>::GetPC() + 2 * 2);
} }
INLINE Addr GetVPC() override { inline Addr GetVPC() override {
return Instruction<S,C>::GetVPC() + 2 * 2; return Instruction<S,C>::GetVPC() + 2 * 2;
} }
INLINE InstType InstType() override { inline InstType InstType() override {
return thumb16; return thumb16;
} }
INLINE Arch Arch() override { inline Arch Arch() override {
return arm32; return arm32;
} }
...@@ -78,60 +82,53 @@ namespace SandHook { ...@@ -78,60 +82,53 @@ namespace SandHook {
class T16_INST_PC_REL : public InstructionT16<S,C> { class T16_INST_PC_REL : public InstructionT16<S,C> {
public: public:
T16_INST_PC_REL() {}
T16_INST_PC_REL(void *inst) : InstructionT16<S,C>(inst) {}; T16_INST_PC_REL(void *inst) : InstructionT16<S,C>(inst) {};
INLINE virtual Off GetImmPCOffset() { inline virtual Off GetImmPCOffset() {
return 0; return 0;
}; };
INLINE virtual Addr GetImmPCOffsetTarget() { inline virtual Addr GetImmPCOffsetTarget() {
return (Addr) this->GetPC() + GetImmPCOffset(); return (Addr) this->GetPC() + GetImmPCOffset();
}; };
INLINE bool PcRelate() override { inline bool PcRelate() override {
return true; return true;
}; };
}; };
class INST_T16(UNKNOW) : public InstructionT16<STRUCT_T16(UNKNOW)> { DEFINE_INST(UNKNOW) {
public: public:
T16_UNKNOW(STRUCT_T16(UNKNOW) &inst); T16_UNKNOW(void *inst);
inline bool unknow() override { inline bool Unknow() override {
return true; return true;
} }
void Disassembler(T16_STRUCT_UNKNOW *inst) override;
void Assembler() override;
private:
STRUCT_T16(UNKNOW) inst_backup;
}; };
class INST_T16(B) : public T16_INST_PC_REL<STRUCT_T16(B)> { DEFINE_INST_PCREL(B) {
public: public:
T16_B();
T16_B(STRUCT_T16(B) *inst); T16_B(void *inst);
T16_B(Off offset); T16_B(Off offset);
T16_B(Label &label); T16_B(Label *label);
DEFINE_IS(B) DEFINE_IS(B)
DEFINE_INST_CODE(B)
void OnOffsetApply(Off offset) override; void OnOffsetApply(Off offset) override;
Off GetImmPCOffset() override; Off GetImmPCOffset() override;
void Disassembler(STRUCT_T16(B) *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -139,26 +136,23 @@ namespace SandHook { ...@@ -139,26 +136,23 @@ namespace SandHook {
Off offset; Off offset;
}; };
class INST_T16(B_COND) : public T16_INST_PC_REL<STRUCT_T16(B_COND)> { DEFINE_INST_PCREL(B_COND) {
public: public:
T16_B_COND();
T16_B_COND(STRUCT_T16(B_COND) *inst); T16_B_COND(void *inst);
T16_B_COND(Condition condition, Off offset); T16_B_COND(Condition condition, Off offset);
T16_B_COND(Condition condition, Label &label); T16_B_COND(Condition condition, Label *label);
DEFINE_IS_EXT(B_COND, TEST_INST_FIELD(opcode, OPCODE_T16(B_COND)) && DEFINE_IS_EXT(B_COND, TEST_INST_FIELD(opcode, OPCODE_T16(B_COND)) &&
INST_FIELD(cond) != 0b1110 && INST_FIELD(cond) != 0b1111) INST_FIELD(cond) != 0b1110 && INST_FIELD(cond) != 0b1111)
DEFINE_INST_CODE(B_COND)
Off GetImmPCOffset() override; Off GetImmPCOffset() override;
void OnOffsetApply(Off offset) override; void OnOffsetApply(Off offset) override;
void Disassembler(STRUCT_T16(B_COND) *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -168,7 +162,7 @@ namespace SandHook { ...@@ -168,7 +162,7 @@ namespace SandHook {
}; };
class INST_T16(BX_BLX) : public T16_INST_PC_REL<STRUCT_T16(BX_BLX)> { DEFINE_INST_PCREL(BX_BLX) {
public: public:
enum OP { enum OP {
...@@ -176,15 +170,13 @@ namespace SandHook { ...@@ -176,15 +170,13 @@ namespace SandHook {
BLX = 0b1 BLX = 0b1
}; };
T16_BX_BLX(T16_STRUCT_BX_BLX *inst); T16_BX_BLX(void *inst);
T16_BX_BLX(OP op, RegisterA32 &rm); T16_BX_BLX(OP op, RegisterA32 &rm);
DEFINE_IS_EXT(BX_BLX, TEST_INST_OPCODE(BX_BLX, 1) && TEST_INST_OPCODE(BX_BLX, 2)) DEFINE_IS_EXT(BX_BLX, TEST_INST_OPCODE(BX_BLX, 1) && TEST_INST_OPCODE(BX_BLX, 2))
DEFINE_INST_CODE(BX_BLX) void Disassembler() override;
void Disassembler(T16_STRUCT_BX_BLX *inst) override;
void Assembler() override; void Assembler() override;
...@@ -194,30 +186,28 @@ namespace SandHook { ...@@ -194,30 +186,28 @@ namespace SandHook {
}; };
class INST_T16(CBZ_CBNZ) : public T16_INST_PC_REL<STRUCT_T16(CBZ_CBNZ)> { DEFINE_INST_PCREL(CBZ_CBNZ) {
public: public:
enum OP { enum OP {
CBZ = 0b0, CBZ = 0b0,
CBNZ = 0b1 CBNZ = 0b1
}; };
T16_CBZ_CBNZ(T16_STRUCT_CBZ_CBNZ *inst); T16_CBZ_CBNZ(void *inst);
T16_CBZ_CBNZ(OP op, Off offset, RegisterA32 &rn); T16_CBZ_CBNZ(OP op, Off offset, RegisterA32 &rn);
T16_CBZ_CBNZ(OP op, Label &label, RegisterA32 &rn); T16_CBZ_CBNZ(OP op, Label *label, RegisterA32 &rn);
DEFINE_IS_EXT(CBZ_CBNZ, DEFINE_IS_EXT(CBZ_CBNZ,
TEST_INST_OPCODE(CBZ_CBNZ, 1) && TEST_INST_OPCODE(CBZ_CBNZ, 2) && TEST_INST_OPCODE(CBZ_CBNZ, 1) && TEST_INST_OPCODE(CBZ_CBNZ, 2) &&
TEST_INST_OPCODE(CBZ_CBNZ, 3)) TEST_INST_OPCODE(CBZ_CBNZ, 3))
DEFINE_INST_CODE(CBZ_CBNZ)
void OnOffsetApply(Off offset) override; void OnOffsetApply(Off offset) override;
Off GetImmPCOffset() override; Off GetImmPCOffset() override;
void Disassembler(T16_STRUCT_CBZ_CBNZ *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -228,23 +218,22 @@ namespace SandHook { ...@@ -228,23 +218,22 @@ namespace SandHook {
}; };
class INST_T16(LDR_LIT) : public T16_INST_PC_REL<STRUCT_T16(LDR_LIT)> { DEFINE_INST_PCREL(LDR_LIT) {
public: public:
T16_LDR_LIT(T16_STRUCT_LDR_LIT *inst);
T16_LDR_LIT(void *inst);
T16_LDR_LIT(Off offset, RegisterA32 &rt); T16_LDR_LIT(Off offset, RegisterA32 &rt);
DEFINE_IS(LDR_LIT) DEFINE_IS(LDR_LIT)
DEFINE_INST_CODE(LDR_LIT)
Addr GetImmPCOffsetTarget() override; Addr GetImmPCOffsetTarget() override;
Off GetImmPCOffset() override; Off GetImmPCOffset() override;
void OnOffsetApply(Off offset) override; void OnOffsetApply(Off offset) override;
void Disassembler(T16_STRUCT_LDR_LIT *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -254,17 +243,15 @@ namespace SandHook { ...@@ -254,17 +243,15 @@ namespace SandHook {
}; };
class INST_T16(ADD_IMM_RDN) : public InstructionT16<STRUCT_T16(ADD_IMM_RDN)> { DEFINE_INST(ADD_IMM_RDN) {
public: public:
T16_ADD_IMM_RDN(T16_STRUCT_ADD_IMM_RDN *inst); T16_ADD_IMM_RDN(void *inst);
T16_ADD_IMM_RDN(RegisterA32 *rdn, U8 imm8); T16_ADD_IMM_RDN(RegisterA32 *rdn, U8 imm8);
DEFINE_IS(ADD_IMM_RDN) DEFINE_IS(ADD_IMM_RDN)
DEFINE_INST_CODE(ADD_IMM_RDN) void Disassembler() override;
void Disassembler(T16_STRUCT_ADD_IMM_RDN *inst) override;
void Assembler() override; void Assembler() override;
...@@ -273,26 +260,24 @@ namespace SandHook { ...@@ -273,26 +260,24 @@ namespace SandHook {
U8 imm8; U8 imm8;
}; };
class INST_T16(ADR) : public T16_INST_PC_REL<STRUCT_T16(ADR)> { DEFINE_INST_PCREL(ADR) {
public: public:
T16_ADR(T16_STRUCT_ADR *inst); T16_ADR(void *inst);
T16_ADR(RegisterA32 &rd, Off offset); T16_ADR(RegisterA32 &rd, Off offset);
T16_ADR(RegisterA32 &rd, Label &label); T16_ADR(RegisterA32 &rd, Label *label);
DEFINE_IS(ADR) DEFINE_IS(ADR)
DEFINE_INST_CODE(ADR)
Off GetImmPCOffset() override; Off GetImmPCOffset() override;
Addr GetImmPCOffsetTarget() override; Addr GetImmPCOffsetTarget() override;
void OnOffsetApply(Off offset) override; void OnOffsetApply(Off offset) override;
void Disassembler(T16_STRUCT_ADR *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -302,20 +287,18 @@ namespace SandHook { ...@@ -302,20 +287,18 @@ namespace SandHook {
}; };
class INST_T16(CMP_REG) : public InstructionT16<STRUCT_T16(CMP_REG)> { DEFINE_INST(CMP_REG) {
public: public:
T16_CMP_REG(); T16_CMP_REG();
T16_CMP_REG(T16_STRUCT_CMP_REG *inst); T16_CMP_REG(void *inst);
T16_CMP_REG(RegisterA32 &rm, RegisterA32 &rn); T16_CMP_REG(RegisterA32 &rm, RegisterA32 &rn);
DEFINE_INST_CODE(CMP_REG)
DEFINE_IS_EXT(CMP_REG, TEST_INST_FIELD(opcode_base, OPCODE_T16(DATA_PROC)) && DEFINE_IS_EXT(CMP_REG, TEST_INST_FIELD(opcode_base, OPCODE_T16(DATA_PROC)) &&
TEST_INST_FIELD(opcode, OPCODE_T16(CMP_REG))) TEST_INST_FIELD(opcode, OPCODE_T16(CMP_REG)))
void Disassembler(T16_STRUCT_CMP_REG *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -325,23 +308,21 @@ namespace SandHook { ...@@ -325,23 +308,21 @@ namespace SandHook {
}; };
class INST_T16(MOV_REG) : public InstructionT16<STRUCT_T16(MOV_REG)> { DEFINE_INST(MOV_REG) {
public: public:
T16_MOV_REG(T16_STRUCT_MOV_REG *inst);
T16_MOV_REG(void *inst);
T16_MOV_REG(RegisterA32 &rd, RegisterA32 &rm); T16_MOV_REG(RegisterA32 &rd, RegisterA32 &rm);
DEFINE_INST_CODE(MOV_REG)
DEFINE_IS_EXT(MOV_REG, TEST_INST_FIELD(opcode_base, OPCODE_T16(DATA_PROC)) && DEFINE_IS_EXT(MOV_REG, TEST_INST_FIELD(opcode_base, OPCODE_T16(DATA_PROC)) &&
TEST_INST_FIELD(opcode, OPCODE_T16(MOV_REG))) TEST_INST_FIELD(opcode, OPCODE_T16(MOV_REG)))
void Disassembler(T16_STRUCT_MOV_REG *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
bool pcRelate() override; bool PcRelate() override;
public: public:
RegisterA32 *rd; RegisterA32 *rd;
...@@ -349,19 +330,16 @@ namespace SandHook { ...@@ -349,19 +330,16 @@ namespace SandHook {
}; };
class INST_T16(ADD_REG) : public InstructionT16<STRUCT_T16(ADD_REG)> { DEFINE_INST(ADD_REG) {
public: public:
T16_ADD_REG();
T16_ADD_REG(T16_STRUCT_ADD_REG *inst); T16_ADD_REG(void *inst);
T16_ADD_REG(RegisterA32 *rd, RegisterA32 *rn, RegisterA32 *rm); T16_ADD_REG(RegisterA32 *rd, RegisterA32 *rn, RegisterA32 *rm);
DEFINE_IS(ADD_REG) DEFINE_IS(ADD_REG)
DEFINE_INST_CODE(ADD_REG) void Disassembler() override;
void Disassembler(T16_STRUCT_ADD_REG *inst) override;
void Assembler() override; void Assembler() override;
...@@ -372,18 +350,16 @@ namespace SandHook { ...@@ -372,18 +350,16 @@ namespace SandHook {
}; };
class INST_T16(CMP_REG_EXT) : public InstructionT16<STRUCT_T16(CMP_REG_EXT)> { DEFINE_INST(CMP_REG_EXT) {
public: public:
T16_CMP_REG_EXT(T16_STRUCT_CMP_REG_EXT *inst); T16_CMP_REG_EXT(void *inst);
T16_CMP_REG_EXT(RegisterA32 &rn, RegisterA32 &rm); T16_CMP_REG_EXT(RegisterA32 &rn, RegisterA32 &rm);
DEFINE_IS(CMP_REG_EXT) DEFINE_IS(CMP_REG_EXT)
DEFINE_INST_CODE(CMP_REG_EXT) void Disassembler() override;
void Disassembler(T16_STRUCT_CMP_REG_EXT *inst) override;
void Assembler() override; void Assembler() override;
...@@ -394,17 +370,15 @@ namespace SandHook { ...@@ -394,17 +370,15 @@ namespace SandHook {
}; };
class INST_T16(POP) : public InstructionT16<STRUCT_T16(POP)> { DEFINE_INST(POP) {
public: public:
T16_POP(T16_STRUCT_POP *inst); T16_POP(void *inst);
T16_POP(const RegisterList &registerList); T16_POP(const RegisterList &registerList);
DEFINE_IS(POP) DEFINE_IS(POP)
DEFINE_INST_CODE(POP) void Disassembler() override;
void Disassembler(T16_STRUCT_POP *inst) override;
void Assembler() override; void Assembler() override;
...@@ -413,17 +387,16 @@ namespace SandHook { ...@@ -413,17 +387,16 @@ namespace SandHook {
}; };
class INST_T16(PUSH) : public InstructionT16<STRUCT_T16(PUSH)> { DEFINE_INST(PUSH) {
public: public:
T16_PUSH(T16_STRUCT_PUSH *inst);
T16_PUSH(void *inst);
T16_PUSH(const RegisterList &registerList); T16_PUSH(const RegisterList &registerList);
DEFINE_IS(PUSH) DEFINE_IS(PUSH)
DEFINE_INST_CODE(PUSH) void Disassembler() override;
void Disassembler(T16_STRUCT_PUSH *inst) override;
void Assembler() override; void Assembler() override;
...@@ -432,9 +405,9 @@ namespace SandHook { ...@@ -432,9 +405,9 @@ namespace SandHook {
}; };
class INST_T16(ADD_REG_RDN) : public InstructionT16<STRUCT_T16(ADD_REG_RDN)> { DEFINE_INST(ADD_REG_RDN) {
public: public:
T16_ADD_REG_RDN(T16_STRUCT_ADD_REG_RDN *inst); T16_ADD_REG_RDN(void *inst);
T16_ADD_REG_RDN(RegisterA32 &rdn, RegisterA32 &rm); T16_ADD_REG_RDN(RegisterA32 &rdn, RegisterA32 &rm);
...@@ -442,11 +415,9 @@ namespace SandHook { ...@@ -442,11 +415,9 @@ namespace SandHook {
DEFINE_IS(ADD_REG_RDN) DEFINE_IS(ADD_REG_RDN)
DEFINE_INST_CODE(ADD_REG_RDN) bool PcRelate() override;
bool pcRelate() override;
void Disassembler(T16_STRUCT_ADD_REG_RDN *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -462,4 +433,7 @@ namespace SandHook { ...@@ -462,4 +433,7 @@ namespace SandHook {
#undef DEFINE_IS #undef DEFINE_IS
#undef TEST_INST_FIELD #undef TEST_INST_FIELD
#undef TEST_INST_OPCODE #undef TEST_INST_OPCODE
#undef DEFINE_INST_CODE #undef DEFINE_INST
\ No newline at end of file #undef DEFINE_INST_EXT
#undef DEFINE_INST_EXT_
#undef DEFINE_INST_PCREL
\ No newline at end of file
...@@ -18,26 +18,17 @@ using namespace SandHook::AsmA32; ...@@ -18,26 +18,17 @@ using namespace SandHook::AsmA32;
//Unknow //Unknow
T32_UNKNOW::T32_UNKNOW(STRUCT_T32(UNKNOW) &inst) : InstructionT32(&inst) { T32_UNKNOW::T32_UNKNOW(void *inst) : InstructionT32(inst) {
Disassembler(&inst);
} }
void T32_UNKNOW::Disassembler(T32_STRUCT_UNKNOW *inst) {
inst_backup = *inst;
}
void T32_UNKNOW::Assembler() {
Set(inst_backup);
}
T32_B32::T32_B32(T32_STRUCT_B32 *inst) : T32_INST_PC_REL(inst) { T32_B32::T32_B32(void *inst) : T32_INST_PC_REL(inst) {
Disassembler(inst);
} }
T32_B32::T32_B32(T32_B32::OP op, T32_B32::X x, Off offset) : op(op), x(x), offset(offset) {} T32_B32::T32_B32(T32_B32::OP op, T32_B32::X x, Off offset) : op(op), x(x), offset(offset) {}
T32_B32::T32_B32(T32_B32::OP op, T32_B32::X x, Label &label) : op(op), x(x) { T32_B32::T32_B32(T32_B32::OP op, T32_B32::X x, Label *label) : op(op), x(x) {
BindLabel(label); BindLabel(label);
} }
...@@ -54,9 +45,9 @@ Off T32_B32::GetImmPCOffset() { ...@@ -54,9 +45,9 @@ Off T32_B32::GetImmPCOffset() {
return SignExtend32(25, COMBINE(Si1i2, imm21, 21) << 1); return SignExtend32(25, COMBINE(Si1i2, imm21, 21) << 1);
} }
void T32_B32::Disassembler(T32_STRUCT_B32 *inst) { void T32_B32::Disassembler() {
DECODE_OP; DECODE_OP;
x = X(inst->X); x = X(Get()->X);
offset = GetImmPCOffset(); offset = GetImmPCOffset();
} }
...@@ -87,7 +78,7 @@ void T32_B32::Assembler() { ...@@ -87,7 +78,7 @@ void T32_B32::Assembler() {
Addr T32_B32::GetImmPCOffsetTarget() { Addr T32_B32::GetImmPCOffsetTarget() {
if (x == arm && op == BL) { if (x == arm && op == BL) {
void* base = reinterpret_cast<void *>(ALIGN((Addr) getPC(), 4)); void* base = reinterpret_cast<void *>(ALIGN((Addr) GetPC(), 4));
return offset + reinterpret_cast<Addr>(base); return offset + reinterpret_cast<Addr>(base);
} else { } else {
return T32_INST_PC_REL::GetImmPCOffsetTarget(); return T32_INST_PC_REL::GetImmPCOffsetTarget();
...@@ -95,16 +86,16 @@ Addr T32_B32::GetImmPCOffsetTarget() { ...@@ -95,16 +86,16 @@ Addr T32_B32::GetImmPCOffsetTarget() {
} }
T32_LDR_UIMM::T32_LDR_UIMM(T32_STRUCT_LDR_UIMM *inst) : InstructionT32(inst) {} T32_LDR_UIMM::T32_LDR_UIMM(void *inst) : InstructionT32(inst) {}
T32_LDR_UIMM::T32_LDR_UIMM(RegisterA32 &rt, RegisterA32 &rn, U32 offset) : rt(&rt), rn(&rn), T32_LDR_UIMM::T32_LDR_UIMM(RegisterA32 &rt, RegisterA32 &rn, U32 offset) : rt(&rt), rn(&rn),
offset(offset) {} offset(offset) {}
void T32_LDR_UIMM::Disassembler(T32_STRUCT_LDR_UIMM *inst) { void T32_LDR_UIMM::Disassembler() {
DECODE_RN(Reg); DECODE_RN(Reg);
DECODE_RT(Reg); DECODE_RT(Reg);
INST_ASSERT(rn == &PC); INST_ASSERT(rn == &PC);
offset = inst->imm12; offset = Get()->imm12;
} }
void T32_LDR_UIMM::Assembler() { void T32_LDR_UIMM::Assembler() {
...@@ -115,16 +106,13 @@ void T32_LDR_UIMM::Assembler() { ...@@ -115,16 +106,13 @@ void T32_LDR_UIMM::Assembler() {
Get()->imm12 = offset; Get()->imm12 = offset;
} }
T32_LDR_LIT::T32_LDR_LIT() {} T32_LDR_LIT::T32_LDR_LIT(void *inst) : T32_INST_PC_REL(inst) {
T32_LDR_LIT::T32_LDR_LIT(T32_STRUCT_LDR_LIT *inst) : T32_INST_PC_REL(inst) {
Disassembler(inst);
} }
T32_LDR_LIT::T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Off offset) : op(op), s(s), rt(&rt), offset(offset) {} T32_LDR_LIT::T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Off offset) : op(op), s(s), rt(&rt), offset(offset) {}
T32_LDR_LIT::T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Label& label) : op(op), s(s), rt(&rt) { T32_LDR_LIT::T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Label* label) : op(op), s(s), rt(&rt) {
BindLabel(label); BindLabel(label);
} }
...@@ -143,10 +131,10 @@ void T32_LDR_LIT::OnOffsetApply(Off offset) { ...@@ -143,10 +131,10 @@ void T32_LDR_LIT::OnOffsetApply(Off offset) {
} }
} }
void T32_LDR_LIT::Disassembler(T32_STRUCT_LDR_LIT *inst) { void T32_LDR_LIT::Disassembler() {
DECODE_OP; DECODE_OP;
DECODE_RT(Reg); DECODE_RT(Reg);
s = S(inst->S); s = S(Get()->S);
offset = GetImmPCOffset(); offset = GetImmPCOffset();
} }
...@@ -165,21 +153,19 @@ void T32_LDR_LIT::Assembler() { ...@@ -165,21 +153,19 @@ void T32_LDR_LIT::Assembler() {
} }
T32_MOV_MOVT_IMM::T32_MOV_MOVT_IMM() {}
T32_MOV_MOVT_IMM::T32_MOV_MOVT_IMM(T32_STRUCT_MOV_MOVT_IMM *inst) : InstructionT32(inst) { T32_MOV_MOVT_IMM::T32_MOV_MOVT_IMM(void *inst) : InstructionT32(inst) {
Disassembler(inst);
} }
T32_MOV_MOVT_IMM::T32_MOV_MOVT_IMM(T32_MOV_MOVT_IMM::OP op, RegisterA32 &rd, U16 imm16) : op(op), T32_MOV_MOVT_IMM::T32_MOV_MOVT_IMM(T32_MOV_MOVT_IMM::OP op, RegisterA32 &rd, U16 imm16) : op(op),
rd(&rd), rd(&rd),
imm16(imm16) {} imm16(imm16) {}
void T32_MOV_MOVT_IMM::Disassembler(T32_STRUCT_MOV_MOVT_IMM *inst) { void T32_MOV_MOVT_IMM::Disassembler() {
DECODE_OP; DECODE_OP;
DECODE_RD(Reg); DECODE_RD(Reg);
U16 imm4i = COMBINE(inst->imm4, inst->i, 1); U16 imm4i = COMBINE(Get()->imm4, Get()->i, 1);
U16 imm38 = COMBINE(inst->imm3, inst->imm8, 8); U16 imm38 = COMBINE(Get()->imm3, Get()->imm8, 8);
imm16 = COMBINE(imm4i, imm38, 11); imm16 = COMBINE(imm4i, imm38, 11);
} }
...@@ -195,28 +181,27 @@ void T32_MOV_MOVT_IMM::Assembler() { ...@@ -195,28 +181,27 @@ void T32_MOV_MOVT_IMM::Assembler() {
} }
T32_LDR_IMM::T32_LDR_IMM(T32_STRUCT_LDR_IMM *inst) : InstructionT32(inst) { T32_LDR_IMM::T32_LDR_IMM(void *inst) : InstructionT32(inst) {
Disassembler(inst);
} }
T32_LDR_IMM::T32_LDR_IMM(T32_LDR_IMM::OP op, RegisterA32 &rt, const MemOperand &operand) : op(op), T32_LDR_IMM::T32_LDR_IMM(T32_LDR_IMM::OP op, RegisterA32 &rt, const MemOperand &operand) : op(op),
rt(&rt), rt(&rt),
operand(operand) {} operand(operand) {}
void T32_LDR_IMM::Disassembler(T32_STRUCT_LDR_IMM *inst) { void T32_LDR_IMM::Disassembler() {
DECODE_OP; DECODE_OP;
DECODE_RT(Reg); DECODE_RT(Reg);
operand.rn = Reg(static_cast<U8>(inst->rn)); operand.rn = Reg(static_cast<U8>(Get()->rn));
if (inst->P == 1 && inst->U == 0 && inst->W == 0) { if (Get()->P == 1 && Get()->U == 0 && Get()->W == 0) {
operand.addr_mode = Offset; operand.addr_mode = Offset;
} else if (inst->P == 0 && inst->W == 1) { } else if (Get()->P == 0 && Get()->W == 1) {
operand.addr_mode = PostIndex; operand.addr_mode = PostIndex;
} else if (inst->P == 1 && inst->W == 1) { } else if (Get()->P == 1 && Get()->W == 1) {
operand.addr_mode = PreIndex; operand.addr_mode = PreIndex;
} else { } else {
valid = false; valid_ = false;
} }
operand.offset = inst->U == 0 ? -inst->imm8 : inst->imm8; operand.offset = Get()->U == 0 ? -Get()->imm8 : Get()->imm8;
} }
void T32_LDR_IMM::Assembler() { void T32_LDR_IMM::Assembler() {
...@@ -246,12 +231,11 @@ void T32_LDR_IMM::Assembler() { ...@@ -246,12 +231,11 @@ void T32_LDR_IMM::Assembler() {
Get()->W = 1; Get()->W = 1;
break; break;
default: default:
valid = false; valid_ = false;
} }
} }
T32_SUB_IMM::T32_SUB_IMM(T32_STRUCT_SUB_IMM *inst) : InstructionT32(inst) { T32_SUB_IMM::T32_SUB_IMM(void *inst) : InstructionT32(inst) {
DisAssembler(inst);
} }
...@@ -14,10 +14,10 @@ ...@@ -14,10 +14,10 @@
#define INST_T32(X) T32_##X #define INST_T32(X) T32_##X
#define IS_OPCODE_T32(RAW,OP) INST_T32(OP)::is(RAW) #define IS_OPCODE_T32(RAW,OP) INST_T32(OP)::Is(RAW)
#define DEFINE_IS_EXT(X, COND) \ #define DEFINE_IS_EXT(X, COND) \
inline static bool is(InstT32& inst) { \ inline static bool Is(InstT32& inst) { \
union { \ union { \
InstT32 raw; \ InstT32 raw; \
STRUCT_T32(X) inst; \ STRUCT_T32(X) inst; \
...@@ -34,10 +34,14 @@ return COND; \ ...@@ -34,10 +34,14 @@ return COND; \
#define TEST_INST_OPCODE(X, INDEX) inst_test.inst.opcode##INDEX == OPCODE_T32(X##_##INDEX) #define TEST_INST_OPCODE(X, INDEX) inst_test.inst.opcode##INDEX == OPCODE_T32(X##_##INDEX)
#define DEFINE_INST_CODE(X) \ #define DEFINE_INST(X) class INST_T32(X) : public InstructionT32<STRUCT_T32(X), ENUM_VALUE(InstCodeT32, InstCodeT32::X)>
inline U32 instCode() override { \
return ENUM_VALUE(InstCodeT32, InstCodeT32::X); \ #define DEFINE_INST_EXT(X,P) class INST_T32(X) : public INST_T32(P)
}
#define DEFINE_INST_EXT_(X,P) class INST_T32(X) : public P<STRUCT_T32(X), ENUM_VALUE(InstCodeT32, InstCodeT32::X)>
#define DEFINE_INST_PCREL(X) class INST_T32(X) : public T32_INST_PC_REL<STRUCT_T32(X), ENUM_VALUE(InstCodeT32, InstCodeT32::X)>
using namespace SandHook::RegistersA32; using namespace SandHook::RegistersA32;
...@@ -45,52 +49,44 @@ namespace SandHook { ...@@ -45,52 +49,44 @@ namespace SandHook {
namespace AsmA32 { namespace AsmA32 {
template<typename Inst> template<typename S,U32 C>
class InstructionT32 : public Instruction<Inst> { class InstructionT32 : public Instruction<S,C> {
public: public:
InstructionT32() {} InstructionT32() {}
InstructionT32(Inst *inst) : Instruction<Inst>(inst) {} InstructionT32(void *inst) : Instruction<S,C>(inst) {}
Inst mask(Inst raw) { U32 Size() override {
return raw & *(this->Get());
}
U32 size() override {
return 4; return 4;
} }
void *getPC() override { void *GetPC() override {
return reinterpret_cast<void *>((Addr) Instruction<Inst>::GetPC() + 2 * 2); return reinterpret_cast<void *>((Addr) Instruction<S,C>::GetPC() + 2 * 2);
}
Addr getVPC() override {
return Instruction<Inst>::GetVPC() + 2 * 2;
} }
static inline S32 SignExtend32(unsigned int bits, U32 value) { Addr GetVPC() override {
return ExtractSignedBitfield32(bits - 1, 0, value); return Instruction<S,C>::GetVPC() + 2 * 2;
} }
InstType instType() override { InstType InstType() override {
return thumb32; return thumb32;
} }
Arch arch() override { Arch Arch() override {
return arm32; return arm32;
} }
}; };
template <typename Inst> template <typename S,U32 C>
class T32_INST_PC_REL : public InstructionT32<Inst> { class T32_INST_PC_REL : public InstructionT32<S,C> {
public: public:
T32_INST_PC_REL() {}; T32_INST_PC_REL() {}
T32_INST_PC_REL(Inst *inst) : InstructionT32<Inst>(inst) {}; T32_INST_PC_REL(void *inst) : InstructionT32<S,C>(inst) {};
virtual Off GetImmPCOffset() { virtual Off GetImmPCOffset() {
return 0; return 0;
...@@ -100,34 +96,26 @@ namespace SandHook { ...@@ -100,34 +96,26 @@ namespace SandHook {
return (Addr) this->GetPC() + GetImmPCOffset(); return (Addr) this->GetPC() + GetImmPCOffset();
}; };
inline bool pcRelate() override { inline bool PcRelate() override {
return true; return true;
}; };
}; };
class INST_T32(UNKNOW) : public InstructionT32<STRUCT_T32(UNKNOW)> { DEFINE_INST(UNKNOW) {
public: public:
T32_UNKNOW(STRUCT_T32(UNKNOW) &inst); T32_UNKNOW(void* inst);
DEFINE_INST_CODE(UNKNOW) inline bool Unknow() override {
inline bool unknow() override {
return true; return true;
} }
void Disassembler(T32_STRUCT_UNKNOW *inst) override;
void Assembler() override;
private:
STRUCT_T32(UNKNOW) inst_backup;
}; };
class INST_T32(B32) : public T32_INST_PC_REL<STRUCT_T32(B32)> { DEFINE_INST_PCREL(B32) {
public: public:
enum OP { enum OP {
...@@ -140,13 +128,11 @@ namespace SandHook { ...@@ -140,13 +128,11 @@ namespace SandHook {
thumb = 0b1 thumb = 0b1
}; };
T32_B32(T32_STRUCT_B32 *inst); T32_B32(void *inst);
T32_B32(OP op, X x, Off offset); T32_B32(OP op, X x, Off offset);
T32_B32(OP op, X x, Label& label); T32_B32(OP op, X x, Label* label);
DEFINE_INST_CODE(B32)
DEFINE_IS_EXT(B32, TEST_INST_FIELD(opcode, OPCODE_T32(B32)) && (TEST_INST_FIELD(op, B) || TEST_INST_FIELD(op, BL))) DEFINE_IS_EXT(B32, TEST_INST_FIELD(opcode, OPCODE_T32(B32)) && (TEST_INST_FIELD(op, B) || TEST_INST_FIELD(op, BL)))
...@@ -154,7 +140,7 @@ namespace SandHook { ...@@ -154,7 +140,7 @@ namespace SandHook {
Off GetImmPCOffset() override; Off GetImmPCOffset() override;
void Disassembler(T32_STRUCT_B32 *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -164,17 +150,16 @@ namespace SandHook { ...@@ -164,17 +150,16 @@ namespace SandHook {
Off offset; Off offset;
}; };
class INST_T32(LDR_UIMM) : public InstructionT32<STRUCT_T32(LDR_UIMM)> { DEFINE_INST(LDR_UIMM) {
public: public:
T32_LDR_UIMM(T32_STRUCT_LDR_UIMM *inst);
T32_LDR_UIMM(RegisterA32 &rt, RegisterA32 &rn, U32 offset); T32_LDR_UIMM(void *inst);
DEFINE_INST_CODE(LDR_UIMM) T32_LDR_UIMM(RegisterA32 &rt, RegisterA32 &rn, U32 offset);
DEFINE_IS(LDR_UIMM) DEFINE_IS(LDR_UIMM)
void Disassembler(T32_STRUCT_LDR_UIMM *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -185,7 +170,7 @@ namespace SandHook { ...@@ -185,7 +170,7 @@ namespace SandHook {
}; };
class INST_T32(LDR_LIT) : public T32_INST_PC_REL<STRUCT_T32(LDR_LIT)> { DEFINE_INST_PCREL(LDR_LIT) {
public: public:
enum OP { enum OP {
...@@ -204,23 +189,19 @@ namespace SandHook { ...@@ -204,23 +189,19 @@ namespace SandHook {
Sign = 0b1 Sign = 0b1
}; };
T32_LDR_LIT(); T32_LDR_LIT(void *inst);
T32_LDR_LIT(T32_STRUCT_LDR_LIT *inst);
T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Off offset); T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Off offset);
T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Label& label); T32_LDR_LIT(OP op, S s, RegisterA32 &rt, Label* label);
DEFINE_IS_EXT(LDR_LIT, TEST_INST_FIELD(opcode, OPCODE_T32(LDR_LIT)) && (TEST_INST_FIELD(op, LDR) || TEST_INST_FIELD(op, LDRB) || TEST_INST_FIELD(op, LDRH))) DEFINE_IS_EXT(LDR_LIT, TEST_INST_FIELD(opcode, OPCODE_T32(LDR_LIT)) && (TEST_INST_FIELD(op, LDR) || TEST_INST_FIELD(op, LDRB) || TEST_INST_FIELD(op, LDRH)))
DEFINE_INST_CODE(LDR_LIT)
Off GetImmPCOffset() override; Off GetImmPCOffset() override;
void OnOffsetApply(Off offset) override; void OnOffsetApply(Off offset) override;
void Disassembler(T32_STRUCT_LDR_LIT *inst) override; void Disassembler() override;
void Assembler() override; void Assembler() override;
...@@ -232,7 +213,7 @@ namespace SandHook { ...@@ -232,7 +213,7 @@ namespace SandHook {
}; };
class INST_T32(MOV_MOVT_IMM) : public InstructionT32<STRUCT_T32(MOV_MOVT_IMM)> { DEFINE_INST(MOV_MOVT_IMM) {
public: public:
enum OP { enum OP {
...@@ -240,17 +221,13 @@ namespace SandHook { ...@@ -240,17 +221,13 @@ namespace SandHook {
MOVT = 0b101100 MOVT = 0b101100
}; };
T32_MOV_MOVT_IMM(); T32_MOV_MOVT_IMM(void *inst);
T32_MOV_MOVT_IMM(T32_STRUCT_MOV_MOVT_IMM *inst);
T32_MOV_MOVT_IMM(OP op, RegisterA32 &rd, U16 imm16); T32_MOV_MOVT_IMM(OP op, RegisterA32 &rd, U16 imm16);
DEFINE_IS_EXT(MOV_MOVT_IMM, TEST_INST_OPCODE(MOV_MOVT_IMM, 1) && TEST_INST_OPCODE(MOV_MOVT_IMM, 2) && (TEST_INST_FIELD(op, MOV) || TEST_INST_FIELD(op, MOVT))) DEFINE_IS_EXT(MOV_MOVT_IMM, TEST_INST_OPCODE(MOV_MOVT_IMM, 1) && TEST_INST_OPCODE(MOV_MOVT_IMM, 2) && (TEST_INST_FIELD(op, MOV) || TEST_INST_FIELD(op, MOVT)))
DEFINE_INST_CODE(MOV_MOVT_IMM) void Disassembler() override;
void Disassembler(T32_STRUCT_MOV_MOVT_IMM *inst) override;
void Assembler() override; void Assembler() override;
...@@ -261,7 +238,7 @@ namespace SandHook { ...@@ -261,7 +238,7 @@ namespace SandHook {
}; };
class INST_T32(LDR_IMM) : public InstructionT32<STRUCT_T32(LDR_IMM)> { DEFINE_INST(LDR_IMM) {
public: public:
enum OP { enum OP {
...@@ -272,15 +249,13 @@ namespace SandHook { ...@@ -272,15 +249,13 @@ namespace SandHook {
LDRSH = 0b0011 LDRSH = 0b0011
}; };
T32_LDR_IMM(T32_STRUCT_LDR_IMM *inst); T32_LDR_IMM(void *inst);
T32_LDR_IMM(OP op, RegisterA32 &rt, const MemOperand &operand); T32_LDR_IMM(OP op, RegisterA32 &rt, const MemOperand &operand);
DEFINE_IS_EXT(LDR_IMM, TEST_INST_OPCODE(LDR_IMM, 1) && TEST_INST_OPCODE(LDR_IMM, 2)) DEFINE_IS_EXT(LDR_IMM, TEST_INST_OPCODE(LDR_IMM, 1) && TEST_INST_OPCODE(LDR_IMM, 2))
DEFINE_INST_CODE(LDR_IMM) void Disassembler() override;
void Disassembler(T32_STRUCT_LDR_IMM *inst) override;
void Assembler() override; void Assembler() override;
...@@ -291,7 +266,7 @@ namespace SandHook { ...@@ -291,7 +266,7 @@ namespace SandHook {
}; };
class INST_T32(SUB_IMM) : public InstructionT32<STRUCT_T32(SUB_IMM)> { DEFINE_INST(SUB_IMM) {
public: public:
enum OP { enum OP {
...@@ -299,11 +274,10 @@ namespace SandHook { ...@@ -299,11 +274,10 @@ namespace SandHook {
T4 = 0b10101 T4 = 0b10101
}; };
T32_SUB_IMM(T32_STRUCT_SUB_IMM *inst); T32_SUB_IMM(void *inst);
DEFINE_IS_EXT(SUB_IMM, TEST_INST_OPCODE(SUB_IMM, 1) && TEST_INST_OPCODE(SUB_IMM, 2) && (TEST_INST_FIELD(op, T3) || TEST_INST_FIELD(op, T4))) DEFINE_IS_EXT(SUB_IMM, TEST_INST_OPCODE(SUB_IMM, 1) && TEST_INST_OPCODE(SUB_IMM, 2) && (TEST_INST_FIELD(op, T3) || TEST_INST_FIELD(op, T4)))
DEFINE_INST_CODE(SUB_IMM)
}; };
} }
...@@ -314,4 +288,7 @@ namespace SandHook { ...@@ -314,4 +288,7 @@ namespace SandHook {
#undef DEFINE_IS #undef DEFINE_IS
#undef TEST_INST_FIELD #undef TEST_INST_FIELD
#undef TEST_INST_OPCODE #undef TEST_INST_OPCODE
#undef DEFINE_INST_CODE #undef DEFINE_INST
#undef DEFINE_INST_EXT
#undef DEFINE_INST_EXT_
#undef DEFINE_INST_PCREL
\ No newline at end of file
...@@ -14,7 +14,7 @@ SandHook::Asm::RegisterA32::RegisterA32() { ...@@ -14,7 +14,7 @@ SandHook::Asm::RegisterA32::RegisterA32() {
} }
U8 SandHook::Asm::RegisterA32::getWide() { U8 SandHook::Asm::RegisterA32::Wide() {
return 4; return 4;
} }
......
...@@ -32,7 +32,7 @@ namespace SandHook { ...@@ -32,7 +32,7 @@ namespace SandHook {
RegisterA32(U8 code); RegisterA32(U8 code);
U8 getWide() override; U8 Wide() override;
virtual bool isUnkonw () { virtual bool isUnkonw () {
return Code() == 38; return Code() == 38;
......
...@@ -24,8 +24,8 @@ CodeRelocateA32::CodeRelocateA32(AssemblerA32 &assembler) : CodeRelocate(assembl ...@@ -24,8 +24,8 @@ CodeRelocateA32::CodeRelocateA32(AssemblerA32 &assembler) : CodeRelocate(assembl
this->assemblerA32 = &assembler; this->assemblerA32 = &assembler;
} }
bool CodeRelocateA32::visit(Unit<Base> *unit, void *pc) { bool CodeRelocateA32::Visit(BaseUnit *unit, void *pc) {
relocate(reinterpret_cast<Instruction<Base> *>(unit), __ getPC()); relocate(reinterpret_cast<BaseInst *>(unit), __ getPC());
curOffset += unit->Size(); curOffset += unit->Size();
if (unit->RefCount() == 0) { if (unit->RefCount() == 0) {
delete unit; delete unit;
...@@ -36,28 +36,28 @@ bool CodeRelocateA32::visit(Unit<Base> *unit, void *pc) { ...@@ -36,28 +36,28 @@ bool CodeRelocateA32::visit(Unit<Base> *unit, void *pc) {
void* CodeRelocateA32::relocate(void *startPc, Addr len, void *toPc = nullptr) throw(ErrorCodeException) { void* CodeRelocateA32::relocate(void *startPc, Addr len, void *toPc = nullptr) throw(ErrorCodeException) {
AutoLock autoLock(relocateLock); AutoLock autoLock(relocateLock);
startAddr = reinterpret_cast<Addr>(startPc); startAddr = reinterpret_cast<Addr>(startPc);
if (isThumbCode(startAddr)) { if (IsThumbCode(startAddr)) {
startAddr = reinterpret_cast<Addr>(getThumbCodeAddress(startPc)); startAddr = reinterpret_cast<Addr>(GetThumbCodeAddress(startPc));
} }
length = len; length = len;
curOffset = 0; curOffset = 0;
__ allocBufferFirst(static_cast<U32>(len * 8)); __ allocBufferFirst(static_cast<U32>(len * 8));
void* curPc = __ getPC(); void* curPc = __ getPC();
if (toPc == nullptr) { if (toPc == nullptr) {
Disassembler::Get()->Disassembler(startPc, len, *this, true); Disassembler::get()->Disassembler(startPc, len, *this, true);
} else { } else {
//TODO //TODO
} }
return curPc; return curPc;
} }
void* CodeRelocateA32::relocate(Instruction<Base> *instruction, void *toPc) throw(ErrorCodeException) { void* CodeRelocateA32::relocate(BaseInst *instruction, void *toPc) throw(ErrorCodeException) {
void* curPc = __ getPC(); void* curPc = __ getPC();
//insert later AddBind labels //insert later AddBind labels
__ Emit(getLaterBindLabel(curOffset)); __ Emit(getLaterBindLabel(curOffset));
if (!instruction->pcRelate()) { if (!instruction->PcRelate()) {
__ Emit(instruction); __ Emit(instruction);
instruction->Ref(); instruction->Ref();
return curPc; return curPc;
...@@ -136,12 +136,12 @@ IMPL_RELOCATE(T16, B) { ...@@ -136,12 +136,12 @@ IMPL_RELOCATE(T16, B) {
ALIGN_FOR_LDR ALIGN_FOR_LDR
__ Ldr(PC, target_label); __ Ldr(PC, target_label);
__ Emit(target_label); __ Emit(target_label);
__ Emit((Addr) getThumbPC(reinterpret_cast<void *>(targetAddr))); __ Emit((Addr) GetThumbPC(reinterpret_cast<void *>(targetAddr)));
} }
IMPL_RELOCATE(T16, BX_BLX) { IMPL_RELOCATE(T16, BX_BLX) {
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
inst->Ref(); inst->Ref();
} }
...@@ -150,8 +150,8 @@ IMPL_RELOCATE(T16, CBZ_CBNZ) { ...@@ -150,8 +150,8 @@ IMPL_RELOCATE(T16, CBZ_CBNZ) {
inst->Ref(); inst->Ref();
if (inRelocateRange(CODE_OFFSET(inst), sizeof(InstT16))) { if (inRelocateRange(CODE_OFFSET(inst), sizeof(InstT16))) {
inst->BindLabel(*getLaterBindLabel(CODE_OFFSET(inst) + curOffset)); inst->BindLabel(getLaterBindLabel(CODE_OFFSET(inst) + curOffset));
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
return; return;
} }
...@@ -161,24 +161,24 @@ IMPL_RELOCATE(T16, CBZ_CBNZ) { ...@@ -161,24 +161,24 @@ IMPL_RELOCATE(T16, CBZ_CBNZ) {
Label* false_label = new Label; Label* false_label = new Label;
Label* target_label = new Label(); Label* target_label = new Label();
inst->BindLabel(*true_label); inst->BindLabel(true_label);
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
__ B(false_label); __ B(false_label);
__ Emit(true_label); __ Emit(true_label);
ALIGN_FOR_LDR ALIGN_FOR_LDR
__ Ldr(PC, target_label); __ Ldr(PC, target_label);
__ Emit(target_label); __ Emit(target_label);
__ Emit((Addr) getThumbPC(reinterpret_cast<void *>(targetAddr))); __ Emit((Addr) GetThumbPC(reinterpret_cast<void *>(targetAddr)));
__ Emit(false_label); __ Emit(false_label);
} }
IMPL_RELOCATE(T16, LDR_LIT) { IMPL_RELOCATE(T16, LDR_LIT) {
if (inRelocateRange(CODE_OFFSET(inst), inst->rt->getWide())) { if (inRelocateRange(CODE_OFFSET(inst), inst->rt->Wide())) {
inst->Ref(); inst->Ref();
inst->BindLabel(*getLaterBindLabel(CODE_OFFSET(inst) + curOffset)); inst->BindLabel(getLaterBindLabel(CODE_OFFSET(inst) + curOffset));
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
return; return;
} }
...@@ -190,10 +190,10 @@ IMPL_RELOCATE(T16, LDR_LIT) { ...@@ -190,10 +190,10 @@ IMPL_RELOCATE(T16, LDR_LIT) {
IMPL_RELOCATE(T16, ADR) { IMPL_RELOCATE(T16, ADR) {
if (inRelocateRange(CODE_OFFSET(inst), inst->rd->getWide())) { if (inRelocateRange(CODE_OFFSET(inst), inst->rd->Wide())) {
inst->Ref(); inst->Ref();
inst->BindLabel(*getLaterBindLabel(CODE_OFFSET(inst) + curOffset)); inst->BindLabel(getLaterBindLabel(CODE_OFFSET(inst) + curOffset));
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
return; return;
} }
...@@ -207,14 +207,14 @@ IMPL_RELOCATE(T16, ADD_REG_RDN) { ...@@ -207,14 +207,14 @@ IMPL_RELOCATE(T16, ADD_REG_RDN) {
if (*inst->rm != PC) { if (*inst->rm != PC) {
inst->Ref(); inst->Ref();
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
return; return;
} }
RegisterA32& tmpReg = *inst->rdn != R0 ? R0 : R1; RegisterA32& tmpReg = *inst->rdn != R0 ? R0 : R1;
__ Push(tmpReg); __ Push(tmpReg);
__ Mov(tmpReg,(Addr)inst->getPC()); __ Mov(tmpReg,(Addr)inst->GetPC());
__ Add(*inst->rdn, *inst->rdn, tmpReg); __ Add(*inst->rdn, *inst->rdn, tmpReg);
__ Pop(tmpReg); __ Pop(tmpReg);
...@@ -224,8 +224,8 @@ IMPL_RELOCATE(T32, B32) { ...@@ -224,8 +224,8 @@ IMPL_RELOCATE(T32, B32) {
if (inRelocateRange(CODE_OFFSET(inst), sizeof(InstT16))) { if (inRelocateRange(CODE_OFFSET(inst), sizeof(InstT16))) {
inst->Ref(); inst->Ref();
inst->BindLabel(*getLaterBindLabel(CODE_OFFSET(inst) + curOffset)); inst->BindLabel(getLaterBindLabel(CODE_OFFSET(inst) + curOffset));
__ Emit(reinterpret_cast<Instruction<Base> *>(inst)); __ Emit(reinterpret_cast<BaseInst *>(inst));
return; return;
} }
...@@ -234,7 +234,7 @@ IMPL_RELOCATE(T32, B32) { ...@@ -234,7 +234,7 @@ IMPL_RELOCATE(T32, B32) {
if (inst->x == T32_B32::thumb) { if (inst->x == T32_B32::thumb) {
//Thumb mode //Thumb mode
targetAddr = reinterpret_cast<Addr>(getThumbPC(reinterpret_cast<void *>(targetAddr))); targetAddr = reinterpret_cast<Addr>(GetThumbPC(reinterpret_cast<void *>(targetAddr)));
} }
__ Mov(IP, targetAddr); __ Mov(IP, targetAddr);
if (inst->op == T32_B32::BL) { if (inst->op == T32_B32::BL) {
...@@ -249,8 +249,8 @@ IMPL_RELOCATE(T32, LDR_LIT) { ...@@ -249,8 +249,8 @@ IMPL_RELOCATE(T32, LDR_LIT) {
if (inRelocateRange(CODE_OFFSET(inst), sizeof(Addr))) { if (inRelocateRange(CODE_OFFSET(inst), sizeof(Addr))) {
inst->Ref(); inst->Ref();
inst->BindLabel(*getLaterBindLabel(CODE_OFFSET(inst) + curOffset)); inst->BindLabel(getLaterBindLabel(CODE_OFFSET(inst) + curOffset));
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
return; return;
} }
...@@ -277,7 +277,7 @@ IMPL_RELOCATE(T32, LDR_LIT) { ...@@ -277,7 +277,7 @@ IMPL_RELOCATE(T32, LDR_LIT) {
break; break;
default: default:
inst->Ref(); inst->Ref();
__ Emit(reinterpret_cast<Instruction<Base>*>(inst)); __ Emit(reinterpret_cast<BaseInst*>(inst));
} }
} }
\ No newline at end of file
...@@ -22,11 +22,11 @@ namespace SandHook { ...@@ -22,11 +22,11 @@ namespace SandHook {
public: public:
CodeRelocateA32(AssemblerA32 &assembler); CodeRelocateA32(AssemblerA32 &assembler);
void* relocate(Instruction<Base> *instruction, void *toPc) throw(ErrorCodeException) override; void* relocate(BaseInst *instruction, void *toPc) throw(ErrorCodeException) override;
void* relocate(void *startPc, Addr len, void *toPc) throw(ErrorCodeException) override; void* relocate(void *startPc, Addr len, void *toPc) throw(ErrorCodeException) override;
bool visit(Unit<Base> *unit, void *pc) override; bool Visit(BaseUnit *unit, void *pc) override;
DEFINE_RELOCATE(T16, B_COND) DEFINE_RELOCATE(T16, B_COND)
......
...@@ -766,7 +766,7 @@ namespace SandHook { ...@@ -766,7 +766,7 @@ namespace SandHook {
#undef DEFINE_IS #undef DEFINE_IS
#undef TEST_INST_FIELD #undef TEST_INST_FIELD
#undef TEST_INST_OPCODE #undef TEST_INST_OPCODE
#undef DEFINE_INST_CODE #undef DEFINE_INST
#undef DEFINE_INST_EXT #undef DEFINE_INST_EXT
#undef DEFINE_INST_EXT_ #undef DEFINE_INST_EXT_
#undef DEFINE_INST_PCREL #undef DEFINE_INST_PCREL
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