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Administrator
SandHook
Commits
0283ee7b
Commit
0283ee7b
authored
May 11, 2019
by
swift_gan
Committed by
swift_gan
May 11, 2019
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tweak code
parent
933b513a
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Showing
10 changed files
with
317 additions
and
99 deletions
+317
-99
CMakeLists.txt
nativehook/CMakeLists.txt
+5
-0
inst_arm32.cpp
nativehook/src/main/cpp/archs/arm32/inst/inst_arm32.cpp
+48
-0
inst_arm32.h
nativehook/src/main/cpp/archs/arm32/inst/inst_arm32.h
+51
-0
inst_strcut_arm32.h
nativehook/src/main/cpp/archs/arm32/inst/inst_strcut_arm32.h
+32
-0
register_a32.cpp
...vehook/src/main/cpp/archs/arm32/register/register_a32.cpp
+13
-0
register_a32.h
nativehook/src/main/cpp/archs/arm32/register/register_a32.h
+36
-0
inst_arm64.cpp
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.cpp
+77
-44
inst_arm64.h
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.h
+39
-38
inst_struct_aarch64.h
...ehook/src/main/cpp/archs/arm64/inst/inst_struct_aarch64.h
+9
-15
sandhook_native.cpp
nativehook/src/main/cpp/sandhook_native.cpp
+7
-2
No files found.
nativehook/CMakeLists.txt
View file @
0283ee7b
...
@@ -24,6 +24,8 @@ add_library( # Sets the name of the library.
...
@@ -24,6 +24,8 @@ add_library( # Sets the name of the library.
src/main/cpp/archs/arm64/register/register_a64.cpp
src/main/cpp/archs/arm64/register/register_a64.cpp
src/main/cpp/archs/arm64/register/register_list_a64.cpp
src/main/cpp/archs/arm64/register/register_list_a64.cpp
src/main/cpp/archs/arm64/decoder/decoder_arm64.cpp
src/main/cpp/archs/arm64/decoder/decoder_arm64.cpp
src/main/cpp/archs/arm32/inst/inst_arm32.cpp
src/main/cpp/archs/arm32/register/register_a32.cpp
src/main/cpp/relocate/code_relocate.cpp
src/main/cpp/relocate/code_relocate.cpp
src/main/cpp/elf/elf.cpp
src/main/cpp/elf/elf.cpp
src/main/cpp/assembler/assembler.cpp
src/main/cpp/assembler/assembler.cpp
...
@@ -41,6 +43,9 @@ include_directories(
...
@@ -41,6 +43,9 @@ include_directories(
src/main/cpp/archs/arm64/inst
src/main/cpp/archs/arm64/inst
src/main/cpp/archs/arm64/register
src/main/cpp/archs/arm64/register
src/main/cpp/archs/arm64/decoder
src/main/cpp/archs/arm64/decoder
src/main/cpp/archs/arm64/assembler
src/main/cpp/archs/arm32/inst
src/main/cpp/archs/arm32/register
)
)
# Searches for a specified prebuilt library and stores the path as a
# Searches for a specified prebuilt library and stores the path as a
...
...
nativehook/src/main/cpp/archs/arm32/inst/inst_arm32.cpp
0 → 100644
View file @
0283ee7b
//
// Created by swift on 2019/5/12.
//
#include "inst_arm32.h"
//// STR IMM
//A64_STR_IMM::A64_STR_IMM() {}
//
//A64_STR_IMM::A64_STR_IMM(STRUCT_A64(STR_IMM) *inst) : InstructionA64(inst) {
// decode(inst);
//}
//
//A64_STR_IMM::A64_STR_IMM(RegisterA64 &rt, const MemOperand &operand) : rt(&rt), operand(operand) {}
//
//A64_STR_IMM::A64_STR_IMM(Condition condition, RegisterA64 &rt, const MemOperand &operand)
// : condition(condition), rt(&rt), operand(operand) {}
//
//AddrMode A64_STR_IMM::decodeAddrMode() {
// if (get()->P == 1 && get()->W == 0) {
// return Offset;
// } else if (get()->P == 0 && get()->W == 0) {
// return PostIndex;
// } else if (get()->P == 1 && get()->W == 1) {
// return PreIndex;
// } else {
// valid = false;
// return NonAddrMode;
// }
//}
//
//void A64_STR_IMM::decode(STRUCT_A64(STR_IMM) *inst) {
// imm32 = zeroExtend32(12, inst->imm12);
// condition = Condition(inst->cond);
// operand.addr_mode = decodeAddrMode();
// index = inst->P == 1;
// wback = inst->P == 1 || inst->W == 0;
// add = inst->U == 0;
// rt = XReg(static_cast<U8>(inst->rt));
// operand.base = XReg(static_cast<U8>(inst->rn));
// operand.offset = add ? imm32 : -imm32;
//}
//
//
//void A64_STR_IMM::assembler() {
// INST_DCHECK(condition, Condition::nv)
//
//}
\ No newline at end of file
nativehook/src/main/cpp/archs/arm32/inst/inst_arm32.h
0 → 100644
View file @
0283ee7b
//
// Created by swift on 2019/5/12.
//
#ifndef SANDHOOK_NH_INST_ARM32_H
#define SANDHOOK_NH_INST_ARM32_H
namespace
SandHook
{
namespace
Asm
{
// class INST_A64(STR_IMM) : public InstructionA64<STRUCT_A64(STR_IMM)> {
// public:
// A64_STR_IMM();
//
// A64_STR_IMM(STRUCT_A64(STR_IMM) *inst);
//
// A64_STR_IMM(RegisterA64 &rt, const MemOperand &operand);
//
// A64_STR_IMM(Condition condition, RegisterA64 &rt, const MemOperand &operand);
//
// DEFINE_IS_EXT(STR_IMM, TEST_INST_FIELD(opcode, OPCODE_A64(STR_IMM)) && TEST_INST_FIELD(unkown1_0, 0) && TEST_INST_FIELD(unkown2_0, 0))
//
// inline U32 instCode() override {
// return STR_x;
// }
//
// void decode(STRUCT_A64(STR_IMM) *inst) override;
//
// void assembler() override;
//
// AddrMode getAddrMode() {
// return operand.addr_mode;
// }
//
// private:
// AddrMode decodeAddrMode();
//
// public:
// Condition condition = Condition::al;
// RegisterA64* rt;
// MemOperand operand = MemOperand(nullptr);
// private:
// bool wback;
// U32 imm32;
// bool add;
// bool index;
//};
}
}
#endif //SANDHOOK_NH_INST_ARM32_H
nativehook/src/main/cpp/archs/arm32/inst/inst_strcut_arm32.h
0 → 100644
View file @
0283ee7b
//
// Created by swift on 2019/5/12.
//
#ifndef SANDHOOK_NH_INST_STRCUT_ARM32_H
#define SANDHOOK_NH_INST_STRCUT_ARM32_H
#include "../../../asm/instruction.h"
#define STRUCT_A32(X) A32_STRUCT_##X
#define OPCODE_A32(X) A32_OPCODE_##X
#define DEFINE_OPCODE(X, V) const U32 OPCODE_A32(X) = V;
#define DEFINE_STRUCT_A32(X) struct STRUCT_A32(X) : public Base
DEFINE_OPCODE
(
STR_IMM
,
0
b010
)
DEFINE_STRUCT_A32
(
STR_IMM
)
{
InstA64
imm12
:
12
;
InstA64
rt
:
4
;
InstA64
rn
:
4
;
InstA64
unkown2_0
:
1
;
InstA64
W
:
1
;
InstA64
unkown1_0
:
1
;
InstA64
U
:
1
;
InstA64
P
:
1
;
InstA64
opcode
:
3
;
InstA64
cond
:
4
;
};
#endif //SANDHOOK_NH_INST_STRCUT_ARM32_H
nativehook/src/main/cpp/archs/arm32/register/register_a32.cpp
0 → 100644
View file @
0283ee7b
//
// Created by swift on 2019/5/12.
//
#include "register_a32.h"
SandHook
::
Asm
::
RegisterA32
::
RegisterA32
(
U8
code
)
:
Register
(
code
)
{
}
SandHook
::
Asm
::
RegisterA32
::
RegisterA32
()
{
}
nativehook/src/main/cpp/archs/arm32/register/register_a32.h
0 → 100644
View file @
0283ee7b
//
// Created by swift on 2019/5/12.
//
#ifndef SANDHOOK_NH_REGISTER_A32_H
#define SANDHOOK_NH_REGISTER_A32_H
#include "base.h"
#include "register.h"
namespace
SandHook
{
namespace
Asm
{
class
RegisterA32
:
public
Register
{
public
:
enum
RegisterType
{
// The kInvalid value is used to detect uninitialized static instances,
// which are always zero-initialized before any constructors are called.
kInvalid
=
0
,
kRegister
,
kVRegister
,
kFPRegister
=
kVRegister
,
kNoRegister
};
RegisterA32
();
RegisterA32
(
U8
code
);
};
}
}
#endif //SANDHOOK_NH_REGISTER_A32_H
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.cpp
View file @
0283ee7b
...
@@ -143,7 +143,7 @@ void A64_B_BL::decode(STRUCT_A64(B_BL) *inst) {
...
@@ -143,7 +143,7 @@ void A64_B_BL::decode(STRUCT_A64(B_BL) *inst) {
void
A64_B_BL
::
assembler
()
{
void
A64_B_BL
::
assembler
()
{
SET_OPCODE
(
B_BL
);
SET_OPCODE
(
B_BL
);
get
()
->
op
=
op
;
get
()
->
op
=
op
;
get
()
->
imm26
=
TruncateToUint26
(
offset
>>
4
);
get
()
->
imm26
=
TruncateToUint26
(
offset
>>
2
);
}
}
...
@@ -283,49 +283,6 @@ void A64_LDR_LIT::assembler() {
...
@@ -283,49 +283,6 @@ void A64_LDR_LIT::assembler() {
// STR IMM
A64_STR_IMM
::
A64_STR_IMM
()
{}
A64_STR_IMM
::
A64_STR_IMM
(
STRUCT_A64
(
STR_IMM
)
*
inst
)
:
InstructionA64
(
inst
)
{
decode
(
inst
);
}
A64_STR_IMM
::
A64_STR_IMM
(
RegisterA64
&
rt
,
const
MemOperand
&
operand
)
:
rt
(
&
rt
),
operand
(
operand
)
{}
A64_STR_IMM
::
A64_STR_IMM
(
Condition
condition
,
RegisterA64
&
rt
,
const
MemOperand
&
operand
)
:
condition
(
condition
),
rt
(
&
rt
),
operand
(
operand
)
{}
AddrMode
A64_STR_IMM
::
decodeAddrMode
()
{
if
(
get
()
->
P
==
1
&&
get
()
->
W
==
0
)
{
return
Offset
;
}
else
if
(
get
()
->
P
==
0
&&
get
()
->
W
==
0
)
{
return
PostIndex
;
}
else
if
(
get
()
->
P
==
1
&&
get
()
->
W
==
1
)
{
return
PreIndex
;
}
else
{
valid
=
false
;
return
NonAddrMode
;
}
}
void
A64_STR_IMM
::
decode
(
STRUCT_A64
(
STR_IMM
)
*
inst
)
{
imm32
=
zeroExtend32
(
12
,
inst
->
imm12
);
condition
=
Condition
(
inst
->
cond
);
operand
.
addr_mode
=
decodeAddrMode
();
index
=
inst
->
P
==
1
;
wback
=
inst
->
P
==
1
||
inst
->
W
==
0
;
add
=
inst
->
U
==
0
;
rt
=
XReg
(
static_cast
<
U8
>
(
inst
->
rt
));
operand
.
base
=
XReg
(
static_cast
<
U8
>
(
inst
->
rn
));
operand
.
offset
=
add
?
imm32
:
-
imm32
;
}
void
A64_STR_IMM
::
assembler
()
{
INST_DCHECK
(
condition
,
Condition
::
nv
)
}
A64_BR_BLR_RET
::
A64_BR_BLR_RET
()
{}
A64_BR_BLR_RET
::
A64_BR_BLR_RET
()
{}
A64_BR_BLR_RET
::
A64_BR_BLR_RET
(
STRUCT_A64
(
BR_BLR_RET
)
&
inst
)
:
InstructionA64
(
&
inst
)
{
A64_BR_BLR_RET
::
A64_BR_BLR_RET
(
STRUCT_A64
(
BR_BLR_RET
)
&
inst
)
:
InstructionA64
(
&
inst
)
{
...
@@ -346,3 +303,79 @@ void A64_BR_BLR_RET::assembler() {
...
@@ -346,3 +303,79 @@ void A64_BR_BLR_RET::assembler() {
get
()
->
rn
=
rn
->
getCode
();
get
()
->
rn
=
rn
->
getCode
();
get
()
->
op
=
op
;
get
()
->
op
=
op
;
}
}
A64_STR_IMM
::
A64_STR_IMM
()
{}
A64_STR_IMM
::
A64_STR_IMM
(
STRUCT_A64
(
STR_IMM
)
&
inst
)
:
InstructionA64
(
&
inst
)
{
decode
(
&
inst
);
}
void
A64_STR_IMM
::
decode
(
STRUCT_A64
(
STR_IMM
)
*
inst
)
{
regSize
=
Size
(
inst
->
size
);
switch
(
regSize
)
{
case
Size64
:
rt
=
XReg
(
static_cast
<
U8
>
(
inst
->
rt
));
operand
.
base
=
XReg
(
static_cast
<
U8
>
(
inst
->
rn
));
break
;
case
Size32
:
rt
=
WReg
(
static_cast
<
U8
>
(
inst
->
rt
));
operand
.
base
=
WReg
(
static_cast
<
U8
>
(
inst
->
rn
));
break
;
default
:
valid
=
false
;
return
;
}
addrMode
=
AdMod
(
inst
->
addrmode
);
switch
(
addrMode
)
{
case
PostIndex
:
wback
=
true
;
postindex
=
true
;
operand
.
addr_mode
=
AddrMode
::
PostIndex
;
break
;
case
PreIndex
:
wback
=
true
;
postindex
=
false
;
operand
.
addr_mode
=
AddrMode
::
PreIndex
;
break
;
default
:
valid
=
false
;
return
;
}
scale
=
static_cast
<
U8
>
(
inst
->
size
);
offset
=
signExtend64
(
9
,
inst
->
imm9
);
operand
.
offset
=
offset
;
}
void
A64_STR_IMM
::
assembler
()
{
SET_OPCODE
(
STR_IMM
);
get
()
->
rt
=
rt
->
getCode
();
get
()
->
rn
=
operand
.
base
->
getCode
();
get
()
->
imm9
=
TruncateToUint9
(
operand
.
offset
);
if
(
rt
->
isX
())
{
get
()
->
size
=
Size64
;
}
else
if
(
rt
->
isW
())
{
get
()
->
size
=
Size32
;
}
else
{
valid
=
false
;
return
;
}
switch
(
operand
.
addr_mode
)
{
case
AddrMode
:
:
PostIndex
:
wback
=
true
;
postindex
=
true
;
get
()
->
addrmode
=
PostIndex
;
break
;
case
AddrMode
:
:
PreIndex
:
wback
=
true
;
postindex
=
false
;
get
()
->
addrmode
=
PreIndex
;
break
;
default
:
valid
=
false
;
return
;
}
}
A64_STR_IMM
::
A64_STR_IMM
(
RegisterA64
&
rt
,
const
MemOperand
&
operand
)
:
rt
(
&
rt
),
operand
(
operand
)
{
}
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.h
View file @
0283ee7b
...
@@ -78,6 +78,8 @@ namespace SandHook {
...
@@ -78,6 +78,8 @@ namespace SandHook {
enum
AddrMode
{
Offset
,
PreIndex
,
PostIndex
,
NonAddrMode
};
enum
AddrMode
{
Offset
,
PreIndex
,
PostIndex
,
NonAddrMode
};
enum
MemOp
{
MemOp_LOAD
,
MemOp_STORE
,
MemOp_PREFETCH
};
class
Operand
{
class
Operand
{
public
:
public
:
inline
explicit
Operand
(
S64
imm
)
inline
explicit
Operand
(
S64
imm
)
...
@@ -103,6 +105,7 @@ namespace SandHook {
...
@@ -103,6 +105,7 @@ namespace SandHook {
class
MemOperand
{
class
MemOperand
{
public
:
public
:
inline
explicit
MemOperand
()
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
Off
offset
=
0
,
AddrMode
addr_mode
=
Offset
)
inline
explicit
MemOperand
(
RegisterA64
*
base
,
Off
offset
=
0
,
AddrMode
addr_mode
=
Offset
)
:
base
(
base
),
reg_offset
(
&
UnknowRegiser
),
offset
(
offset
),
addr_mode
(
addr_mode
),
shift
(
NO_SHIFT
),
:
base
(
base
),
reg_offset
(
&
UnknowRegiser
),
offset
(
offset
),
addr_mode
(
addr_mode
),
shift
(
NO_SHIFT
),
extend
(
NO_EXTEND
),
shift_extend_imm
(
0
)
{}
extend
(
NO_EXTEND
),
shift_extend_imm
(
0
)
{}
...
@@ -476,70 +479,68 @@ namespace SandHook {
...
@@ -476,70 +479,68 @@ namespace SandHook {
};
};
class
INST_A64
(
BR_BLR_RET
)
:
public
InstructionA64
<
STRUCT_A64
(
BR_BLR_RET
)
>
{
class
INST_A64
(
STR_IMM
)
:
public
InstructionA64
<
STRUCT_A64
(
STR_IMM
)
>
{
public
:
public
:
A64_STR_IMM
();
A64_STR_IMM
(
STRUCT_A64
(
STR_IMM
)
*
inst
);
enum
OP
{
BR
=
0
b00
,
BLR
=
0
b01
,
RET
=
0
b11
};
A64_
STR_IMM
(
RegisterA64
&
rt
,
const
MemOperand
&
operand
);
A64_
BR_BLR_RET
(
);
A64_
STR_IMM
(
Condition
condition
,
RegisterA64
&
rt
,
const
MemOperand
&
operand
);
A64_
BR_BLR_RET
(
STRUCT_A64
(
BR_BLR_RET
)
&
inst
);
DEFINE_IS_EXT
(
STR_IMM
,
TEST_INST_FIELD
(
opcode
,
OPCODE_A64
(
STR_IMM
))
&&
TEST_INST_FIELD
(
unkown1_0
,
0
)
&&
TEST_INST_FIELD
(
unkown2_0
,
0
))
A64_BR_BLR_RET
(
OP
op
,
XRegister
&
rn
);
inline
U32
instCode
()
override
{
DEFINE_IS_EXT
(
BR_BLR_RET
,
TEST_INST_OPCODE
(
BR_BLR_RET
,
1
)
&&
TEST_INST_OPCODE
(
BR_BLR_RET
,
2
)
&&
TEST_INST_OPCODE
(
BR_BLR_RET
,
3
))
return
STR_x
;
}
void
decode
(
STRUCT_A64
(
STR_IMM
)
*
inst
)
override
;
void
decode
(
A64_STRUCT_BR_BLR_RET
*
inst
)
override
;
void
assembler
()
override
;
void
assembler
()
override
;
AddrMode
getAddrMode
()
{
return
operand
.
addr_mode
;
}
private
:
AddrMode
decodeAddrMode
();
public
:
public
:
Condition
condition
=
Condition
::
al
;
OP
op
;
RegisterA64
*
rt
;
XRegister
*
rn
;
MemOperand
operand
=
MemOperand
(
nullptr
);
private
:
bool
wback
;
U32
imm32
;
bool
add
;
bool
index
;
};
};
class
INST_A64
(
BR_BLR_RET
)
:
public
InstructionA64
<
STRUCT_A64
(
BR_BLR_RET
)
>
{
class
INST_A64
(
STR_IMM
)
:
public
InstructionA64
<
STRUCT_A64
(
STR_IMM
)
>
{
public
:
public
:
enum
OP
{
enum
AdMod
{
BR
=
0
b00
,
PostIndex
=
0
b00
,
BLR
=
0
b01
,
PreIndex
=
0
b11
RET
=
0
b11
};
};
A64_BR_BLR_RET
();
enum
Size
{
Size32
=
0
b10
,
Size64
=
0
b11
};
A64_
BR_BLR_RET
(
STRUCT_A64
(
BR_BLR_RET
)
&
inst
);
A64_
STR_IMM
(
);
A64_
BR_BLR_RET
(
OP
op
,
XRegister
&
rn
);
A64_
STR_IMM
(
STRUCT_A64
(
STR_IMM
)
&
inst
);
DEFINE_IS_EXT
(
BR_BLR_RET
,
TEST_INST_OPCODE
(
BR_BLR_RET
,
1
)
&&
TEST_INST_OPCODE
(
BR_BLR_RET
,
2
)
&&
TEST_INST_OPCODE
(
BR_BLR_RET
,
3
))
A64_STR_IMM
(
RegisterA64
&
rt
,
const
MemOperand
&
operand
);
void
decode
(
A64_STRUCT_BR_BLR_RET
*
inst
)
override
;
DEFINE_IS
(
STR_IMM
)
void
decode
(
STRUCT_A64
(
STR_IMM
)
*
inst
)
override
;
void
assembler
()
override
;
void
assembler
()
override
;
public
:
public
:
OP
op
;
RegisterA64
*
rt
;
XRegister
*
rn
;
MemOperand
operand
=
MemOperand
();
private
:
AdMod
addrMode
;
Size
regSize
;
U8
scale
;
bool
wback
;
bool
postindex
;
Off
offset
;
};
};
}
}
...
...
nativehook/src/main/cpp/archs/arm64/inst/inst_struct_aarch64.h
View file @
0283ee7b
...
@@ -155,20 +155,6 @@ DEFINE_STRUCT_A64(LDR_LIT) {
...
@@ -155,20 +155,6 @@ DEFINE_STRUCT_A64(LDR_LIT) {
InstA64
op
:
2
;
InstA64
op
:
2
;
};
};
DEFINE_OPCODE
(
STR_IMM
,
0
b011
)
DEFINE_STRUCT_A64
(
STR_IMM
)
{
InstA64
imm12
:
12
;
InstA64
rt
:
4
;
InstA64
rn
:
4
;
InstA64
unkown2_0
:
1
;
InstA64
W
:
1
;
InstA64
unkown1_0
:
1
;
InstA64
U
:
1
;
InstA64
P
:
1
;
InstA64
opcode
:
3
;
InstA64
cond
:
4
;
};
DEFINE_OPCODE
(
BR_BLR_RET_1
,
0
b110101100
)
DEFINE_OPCODE
(
BR_BLR_RET_1
,
0
b110101100
)
DEFINE_OPCODE
(
BR_BLR_RET_2
,
0
b11111000000
)
DEFINE_OPCODE
(
BR_BLR_RET_2
,
0
b11111000000
)
DEFINE_OPCODE
(
BR_BLR_RET_3
,
0
b00000
)
DEFINE_OPCODE
(
BR_BLR_RET_3
,
0
b00000
)
...
@@ -181,7 +167,15 @@ DEFINE_STRUCT_A64(BR_BLR_RET) {
...
@@ -181,7 +167,15 @@ DEFINE_STRUCT_A64(BR_BLR_RET) {
};
};
DEFINE_OPCODE
(
STR_IMM
,
0
b111000000
)
DEFINE_STRUCT_A64
(
STR_IMM
)
{
InstA64
rt
:
5
;
InstA64
rn
:
5
;
InstA64
addrmode
:
2
;
InstA64
imm9
:
9
;
InstA64
opcode
:
9
;
InstA64
size
:
2
;
};
#endif //SANDHOOK_NH_INST_AARCH64_H
#endif //SANDHOOK_NH_INST_AARCH64_H
nativehook/src/main/cpp/sandhook_native.cpp
View file @
0283ee7b
...
@@ -31,8 +31,8 @@ JNIEXPORT void JNICALL
...
@@ -31,8 +31,8 @@ JNIEXPORT void JNICALL
Java_com_swift_sandhook_nativehook_NativeHook_test
(
JNIEnv
*
env
,
jclass
jclass1
)
{
Java_com_swift_sandhook_nativehook_NativeHook_test
(
JNIEnv
*
env
,
jclass
jclass1
)
{
union
{
union
{
InstA64
raw
=
0x
36A01005
;
InstA64
raw
=
0x
F8020C43
;
STRUCT_A64
(
TBZ_TBNZ
)
bl
;
STRUCT_A64
(
STR_IMM
)
str
;
}
test
;
}
test
;
InstA64
*
codebl
=
reinterpret_cast
<
InstA64
*>
((
Addr
)
do1
+
8
);
InstA64
*
codebl
=
reinterpret_cast
<
InstA64
*>
((
Addr
)
do1
+
8
);
...
@@ -54,4 +54,9 @@ Java_com_swift_sandhook_nativehook_NativeHook_test(JNIEnv *env, jclass jclass1)
...
@@ -54,4 +54,9 @@ Java_com_swift_sandhook_nativehook_NativeHook_test(JNIEnv *env, jclass jclass1)
}
}
if
(
IS_OPCODE
(
test
.
raw
,
STR_IMM
))
{
A64_STR_IMM
str
(
test
.
str
);
str
.
get
();
}
}
}
\ No newline at end of file
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