Commit 56e5ee2c authored by swift_gan's avatar swift_gan

[NativeHook]add inst stp ldp

parent d202ce56
......@@ -252,7 +252,9 @@ void *getSymCompat(const char *filename, const char *name) {
if (SDK_INT >= ANDROID_N) {
void* handle = fake_dlopen(filename, RTLD_NOW);
if (handle) {
return fake_dlsym(handle, name);
void* ret = fake_dlsym(handle, name);
fake_dlclose(handle);
return ret;
}
} else {
void* handle = dlopen(filename, RTLD_LAZY | RTLD_GLOBAL);
......
......@@ -207,6 +207,14 @@ void AssemblerA64::Subs(RegisterA64 &rd, RegisterA64 &rn, const Operand &operand
Emit(reinterpret_cast<Unit<Base> *>(new INST_A64(SUB_EXT_REG)(rd, rn, operand, SetFlags)));
}
void AssemblerA64::stp(RegisterA64 &rt1, RegisterA64 &rt2, const MemOperand operand) {
Emit(reinterpret_cast<Unit<Base> *>(new INST_A64(STP_LDP)(INST_A64(STP_LDP)::STP, rt1, rt2, operand)));
}
void AssemblerA64::ldp(RegisterA64 &rt1, RegisterA64 &rt2, const MemOperand operand) {
Emit(reinterpret_cast<Unit<Base> *>(new INST_A64(STP_LDP)(INST_A64(STP_LDP)::LDP, rt1, rt2, operand)));
}
......@@ -74,6 +74,9 @@ namespace SandHook {
void Subs(RegisterA64& rd, RegisterA64& rn, const Operand& operand);
void Cmp(RegisterA64& rn, const Operand& operand);
void stp(RegisterA64& rt1, RegisterA64& rt2, const MemOperand operand);
void ldp(RegisterA64& rt1, RegisterA64& rt2, const MemOperand operand);
public:
CodeContainer codeContainer = CodeContainer(nullptr);
......
......@@ -43,6 +43,7 @@ void Arm64Decoder::decode(void *codeStart, Addr codeLen, InstVisitor &visitor, b
CASE(SUB_EXT_REG)
CASE(SVC)
CASE(EXCEPTION_GEN)
CASE(STP_LDP)
label_matched:
if (unit == nullptr) {
unit = reinterpret_cast<Unit<Base> *>(new INST_A64(UNKNOW)(*reinterpret_cast<STRUCT_A64(UNKNOW) *>(pc)));
......
......@@ -789,3 +789,61 @@ void A64_LDRSW_UIMM::assembler() {
get()->rn = operand.base->getCode();
get()->imm12 = operand.offset >> Size32;
}
A64_STP_LDP::A64_STP_LDP(A64_STRUCT_STP_LDP &inst) : InstructionA64(&inst) {
decode(&inst);
}
A64_STP_LDP::A64_STP_LDP(OP op, RegisterA64 &rt1, RegisterA64 &rt2, const MemOperand &operand) : op(op), rt1(&rt1),
rt2(&rt2),
operand(operand) {}
void A64_STP_LDP::decode(A64_STRUCT_STP_LDP *inst) {
DECODE_OP;
Size s = Size(inst->size);
if (s == Size64) {
rt1 = XReg(inst->rt);
rt2 = XReg(inst->rt2);
operand.offset = signExtend64(7, inst->imm7) << 3;
} else {
rt1 = WReg(inst->rt);
rt2 = WReg(inst->rt2);
operand.offset = signExtend64(7, inst->imm7) << 2;
}
operand.base = XReg(inst->rn);
AdMod adMod = AdMod(inst->addrmode);
switch (adMod) {
case SignOffset:
operand.addr_mode = AddrMode::Offset;
break;
case PostIndex:
operand.addr_mode = AddrMode::PostIndex;
break;
case PreIndex:
operand.addr_mode = AddrMode::PreIndex;
break;
}
}
void A64_STP_LDP::assembler() {
SET_OPCODE(STP_LDP);
ENCODE_OP;
get()->size = rt1->isX() ? Size64 : Size32;
get()->rt = rt1->getCode();
get()->rt2 = rt2->getCode();
get()->rn = operand.base->getCode();
switch (operand.addr_mode) {
case Offset:
get()->addrmode = SignOffset;
break;
case AddrMode::PostIndex:
get()->addrmode = PostIndex;
break;
case AddrMode::PreIndex:
get()->addrmode = PreIndex;
break;
}
get()->imm7 = TruncateToUint7(operand.offset >> (rt1->isX() ? 3 : 2));
}
......@@ -739,6 +739,44 @@ namespace SandHook {
void assembler() override;
};
class INST_A64(STP_LDP) : public InstructionA64<STRUCT_A64(STP_LDP)> {
public:
enum OP {
STP = 0b0,
LDP = 0b1
};
enum AdMod {
SignOffset = 0b10,
PostIndex = 0b01,
PreIndex = 0b11
};
enum Size {
Size32 = 0b00,
Size64 = 0b10
};
A64_STP_LDP(A64_STRUCT_STP_LDP &inst);
A64_STP_LDP(OP op, RegisterA64 &rt1, RegisterA64 &rt2, const MemOperand &operand);
DEFINE_IS(STP_LDP)
DEFINE_INST_CODE(STP_LDP)
void decode(A64_STRUCT_STP_LDP *inst) override;
void assembler() override;
public:
OP op;
RegisterA64* rt1;
RegisterA64* rt2;
MemOperand operand;
};
}
}
......
......@@ -26,7 +26,8 @@ enum class InstCodeA64 {
TBZ_TBNZ,
SUB_EXT_REG,
EXCEPTION_GEN,
SVC
SVC,
STP_LDP,
};
#endif //SANDHOOK_NH_INST_CODE_ARM64_H
......@@ -203,7 +203,17 @@ DEFINE_STRUCT_A64(EXCEPTION_GEN) {
struct STRUCT_A64(SVC) : STRUCT_A64(EXCEPTION_GEN) {
};
DEFINE_OPCODE_A64(STP_LDP, 0b10100)
DEFINE_STRUCT_A64(STP_LDP) {
InstA64 rt:WideReg;
InstA64 rn:WideReg;
InstA64 rt2:WideReg;
InstA64 imm7:7;
InstA64 op:1;
InstA64 addrmode:2;
InstA64 opcode:5;
InstA64 size:2;
};
......
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