Commit 89594d29 authored by swift_gan's avatar swift_gan Committed by swift_gan

[NativeHook]tweak register & add some insts

parent 1b1df47a
......@@ -3,6 +3,7 @@
//
#include "assembler_a32.h"
#include "exception.h"
using namespace SandHook::Assembler;
using namespace SandHook::RegistersA32;
......@@ -127,3 +128,29 @@ void AssemblerA32::Add(RegisterA32 &rdn, U8 imm8) {
void AssemblerA32::Add(RegisterA32 &rd, RegisterA32 &rn, RegisterA32 &rm) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(ADD_REG)(&rd, &rn, &rm)));
}
void AssemblerA32::Cmp(RegisterA32 &rd, RegisterA32 &rn) {
if (rd.getCode() < 8 && rn.getCode() < 8) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(CMP_REG)(rd, rn)));
} else {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(CMP_REG_EXT)(rd, rn)));
}
}
void AssemblerA32::Pop(RegisterA32 &rt) {
if (rt.getCode() < 8 || rt == PC) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(POP)(RegisterList(rt))));
} else {
throw ErrorCodeException("error pop inst");
}
}
void AssemblerA32::Push(RegisterA32 &rt) {
if (rt.getCode() < 8 || rt == PC) {
Emit(reinterpret_cast<Unit<Base>*>(new INST_T16(PUSH)(RegisterList(rt))));
} else {
throw ErrorCodeException("error pop inst");
}
}
......@@ -58,6 +58,11 @@ namespace SandHook {
void Add(RegisterA32 &rd, RegisterA32 &rn, RegisterA32& rm);
void Cmp(RegisterA32 &rn, RegisterA32 &rm);
void Pop(RegisterA32& rt);
void Push(RegisterA32& rt);
public:
CodeContainer codeContainer = CodeContainer(nullptr);
};
......
......@@ -68,9 +68,9 @@ namespace SandHook {
RegisterList(RegisterA32& reg1, RegisterA32& reg2, RegisterA32& reg3, RegisterA32& reg4)
: list_(RegisterToList(reg1) | RegisterToList(reg2) |
RegisterToList(reg3) | RegisterToList(reg4)) {}
explicit RegisterList(uint32_t list) : list_(list) {}
uint32_t GetList() const { return list_; }
void SetList(uint32_t list) { list_ = list; }
explicit RegisterList(U16 list) : list_(list) {}
U16 GetList() const { return list_; }
void SetList(U16 list) { list_ = list; }
bool Includes(RegisterA32& reg) const {
return (list_ & RegisterToList(reg)) != 0;
}
......@@ -89,7 +89,6 @@ namespace SandHook {
// True if all the registers from the list are not from r8-r13 nor from r15.
return (list_ & 0xbf00) == 0;
}
Register GetFirstAvailableRegister() const;
bool IsEmpty() const { return list_ == 0; }
static RegisterList Union(const RegisterList& list_1,
const RegisterList& list_2) {
......@@ -124,17 +123,17 @@ namespace SandHook {
}
private:
static uint32_t RegisterToList(RegisterA32& reg) {
static U16 RegisterToList(RegisterA32& reg) {
if (reg.getCode() == UnknowRegiser.getCode()) {
return 0;
} else {
return UINT32_C(1) << reg.getCode();
return static_cast<U16>(UINT16_C(1) << reg.getCode());
}
}
// Bitfield representation of all registers in the list
// (1 for r0, 2 for r1, 4 for r2, ...).
uint32_t list_;
U16 list_;
};
inline uint32_t GetRegisterListEncoding(const RegisterList& registers,
......
......@@ -28,6 +28,9 @@ enum class InstCodeT16 {
CMP_REG_EXT,
MOV_IMM,
MOV_REG,
ADD_IMM_RND,
POP,
PUSH
};
enum class InstCodeT32 {
......
......@@ -131,5 +131,19 @@ DEFINE_STRUCT_T16(ADD_REG) {
InstT16 opcode:7;
};
DEFINE_OPCODE_T16(POP, 0b1011110)
DEFINE_STRUCT_T16(POP) {
InstT16 regs:8;
InstT16 P:1;
InstT16 opcode:7;
};
DEFINE_OPCODE_T16(PUSH, 0b1011010)
DEFINE_STRUCT_T16(PUSH) {
InstT16 regs:8;
InstT16 M:1;
InstT16 opcode:7;
};
#endif //SANDHOOK_NH_INST_STRUCT_T16_H
......@@ -315,7 +315,7 @@ T16_CMP_REG_EXT::T16_CMP_REG_EXT(T16_STRUCT_CMP_REG_EXT *inst) : InstructionT16(
decode(inst);
}
T16_CMP_REG_EXT::T16_CMP_REG_EXT(RegisterA32 *rn, RegisterA32 *rm) : rn(rn), rm(rm) {}
T16_CMP_REG_EXT::T16_CMP_REG_EXT(RegisterA32 &rn, RegisterA32 &rm) : rn(&rn), rm(&rm) {}
void T16_CMP_REG_EXT::decode(T16_STRUCT_CMP_REG_EXT *inst) {
rn = Reg(COMBINE(inst->N, inst->rn, 3));
......@@ -328,3 +328,41 @@ void T16_CMP_REG_EXT::assembler() {
get()->rn = BITS(rn->getCode(), 0, 2);
get()->N = BIT(rn->getCode(), 3);
}
//POP
T16_POP::T16_POP(T16_STRUCT_POP *inst) : InstructionT16(inst) {
decode(inst);
}
T16_POP::T16_POP(const RegisterList &registerList) : registerList(registerList) {}
void T16_POP::decode(T16_STRUCT_POP *inst) {
registerList.SetList(COMBINE(inst->P << 7, inst->regs, 8));
}
void T16_POP::assembler() {
SET_OPCODE(POP);
U16 regs = registerList.GetList();
get()->regs = BITS(regs, 0, 7);
get()->P = BIT(regs, 15);
}
//PUSH
T16_PUSH::T16_PUSH(T16_STRUCT_PUSH *inst) : InstructionT16(inst) {
decode(inst);
}
T16_PUSH::T16_PUSH(const RegisterList &registerList) : registerList(registerList) {}
void T16_PUSH::decode(T16_STRUCT_PUSH *inst) {
registerList.SetList(COMBINE(inst->M << 7, inst->regs, 8));
}
void T16_PUSH::assembler() {
SET_OPCODE(POP);
U16 regs = registerList.GetList();
get()->regs = BITS(regs, 0, 7);
get()->M = BIT(regs, 15);
}
\ No newline at end of file
......@@ -9,6 +9,7 @@
#include "register_list_a32.h"
#include "inst_struct_t16.h"
#include "inst_code_arm32.h"
#include "arm32_base.h"
#define INST_T16(X) T16_##X
......@@ -59,8 +60,12 @@ namespace SandHook {
return 2;
}
void onLabelApply(Addr pc) override {
this->onOffsetApply(pc - this->getVPC() - 2 * size());
void *getPC() override {
return reinterpret_cast<void *>((Addr) Instruction<Inst>::getPC() + 2 * size());
}
Addr getVPC() override {
return Instruction<Inst>::getVPC() + 2 * size();
}
static inline U32 zeroExtend32(unsigned int bits, U32 value) {
......@@ -252,6 +257,10 @@ namespace SandHook {
T16_ADD_IMM_RDN(RegisterA32 *rdn, U8 imm8);
DEFINE_IS(ADD_IMM_RDN)
DEFINE_INST_CODE(ADD_IMM_RND)
void decode(T16_STRUCT_ADD_IMM_RDN *inst) override;
void assembler() override;
......@@ -361,7 +370,7 @@ namespace SandHook {
T16_CMP_REG_EXT(T16_STRUCT_CMP_REG_EXT *inst);
T16_CMP_REG_EXT(RegisterA32 *rn, RegisterA32 *rm);
T16_CMP_REG_EXT(RegisterA32 &rn, RegisterA32 &rm);
DEFINE_IS(CMP_REG_EXT)
......@@ -377,6 +386,44 @@ namespace SandHook {
RegisterA32* rm;
};
class INST_T16(POP) : public InstructionT16<STRUCT_T16(POP)> {
public:
T16_POP(T16_STRUCT_POP *inst);
T16_POP(const RegisterList &registerList);
DEFINE_IS(POP)
DEFINE_INST_CODE(POP)
void decode(T16_STRUCT_POP *inst) override;
void assembler() override;
public:
RegisterList registerList;
};
class INST_T16(PUSH) : public InstructionT16<STRUCT_T16(PUSH)> {
public:
T16_PUSH(T16_STRUCT_PUSH *inst);
T16_PUSH(const RegisterList &registerList);
DEFINE_IS(PUSH)
DEFINE_INST_CODE(PUSH)
void decode(T16_STRUCT_PUSH *inst) override;
void assembler() override;
public:
RegisterList registerList;
};
}
}
......
......@@ -61,8 +61,12 @@ namespace SandHook {
return 4;
}
void onLabelApply(Addr pc) override {
this->onOffsetApply(pc - this->getVPC() - 2 * size());
void *getPC() override {
return reinterpret_cast<void *>((Addr) Instruction<Inst>::getPC() + 2 * size());
}
Addr getVPC() override {
return Instruction<Inst>::getVPC() + 2 * size();
}
static inline S32 signExtend32(unsigned int bits, U32 value) {
......
......@@ -13,7 +13,20 @@ namespace SandHook {
namespace Asm {
class RegisterA32 : public Register {
union A32RegisterStruct {
struct {
U8 b3;
U8 b2;
U8 b1;
U8 b0;
} u8;
struct {
U16 h;
U16 l;
} u16;
};
class RegisterA32 : public Register<A32RegisterStruct> {
public:
RegisterA32();
......
......@@ -281,23 +281,6 @@ namespace SandHook {
void decode(STRUCT_A64(MOV_WIDE) *decode) override;
inline U8 getShift() {
return shift;
}
inline OP getOpt() {
return op;
}
inline U16 getImme() {
return imme;
}
inline Register* getRd() {
return rd;
}
public:
//can be 16/32/64/128
//hw = shift / 16
......
......@@ -11,7 +11,20 @@ namespace SandHook {
namespace Asm {
class RegisterA64 : public Register {
union A64RegisterStruct {
struct {
U16 d3;
U16 d2;
U16 d1;
U16 d0;
} u16;
struct {
U32 h;
U32 l;
} u32;
};
class RegisterA64 : public Register<A64RegisterStruct> {
public:
enum RegisterType {
......
......@@ -5,4 +5,16 @@
#ifndef SANDHOOK_CPU_H
#define SANDHOOK_CPU_H
#include "register.h"
namespace SandHook {
namespace VM {
class CPU {
public:
};
}
}
#endif //SANDHOOK_CPU_H
......@@ -17,6 +17,7 @@ namespace SandHook {
Reg128Bit = 128
};
template <typename Data>
class Register {
public:
......@@ -64,8 +65,17 @@ namespace SandHook {
return !(rhs == *this);
}
virtual void setData(Data data) {
this->data = data;
}
virtual Data& getData() {
return data;
}
private:
U8 code;
Data data;
};
}
}
......
......@@ -34,12 +34,12 @@ namespace SandHook {
return auto_alloc ? nullptr : raw;
}
inline Addr getVPC() {
return vPC;
virtual Addr getVPC() {
return vPos;
}
inline void setVPC(Addr vPC) {
this->vPC = vPC;
inline void setVPos(Addr vPos) {
this->vPos = vPos;
}
inline Raw* get() const {
......@@ -88,7 +88,7 @@ namespace SandHook {
private:
Raw* raw;
Addr vPC;
Addr vPos;
bool auto_alloc = false;
};
......
......@@ -16,7 +16,7 @@ void CodeContainer::setCodeBuffer(CodeBuffer *codeBuffer) {
void CodeContainer::append(Unit<Base> *unit) {
units.push_back(unit);
unit->setVPC(curPc);
unit->setVPos(curPc);
switch (unit->unitType()) {
case UnitLabel:
labels.push_back((Label*)unit);
......
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