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SandHook
Commits
d714cd48
Commit
d714cd48
authored
Aug 21, 2019
by
swift_gan
Browse files
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Plain Diff
fix some bugs
parent
4e3ca8e8
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Showing
6 changed files
with
35 additions
and
33 deletions
+35
-33
decoder_arm64.cpp
...ok/src/main/cpp/archs/arm/arm64/decoder/decoder_arm64.cpp
+3
-3
inst_arm64.cpp
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.cpp
+19
-19
inst_arm64.h
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.h
+1
-1
register_arm64.h
...ok/src/main/cpp/archs/arm/arm64/register/register_arm64.h
+4
-2
decoder.cpp
nativehook/src/main/cpp/decoder/decoder.cpp
+2
-2
decoder.h
nativehook/src/main/cpp/includes/decoder.h
+6
-6
No files found.
nativehook/src/main/cpp/archs/arm/arm64/decoder/decoder_arm64.cpp
View file @
d714cd48
...
...
@@ -31,6 +31,9 @@ void Arm64Decoder::Disassemble(void *codeStart, Addr codeLen, InstVisitor &visit
CASE
(
ADR_ADRP
)
if
(
onlyPcRelInst
)
goto
label_matched
;
CASE
(
BR_BLR_RET
)
CASE
(
EXCEPTION_GEN
)
CASE
(
MSR_MRS
)
CASE
(
MOV_WIDE
)
CASE
(
MOV_REG
)
CASE
(
LDR_IMM
)
...
...
@@ -39,10 +42,7 @@ void Arm64Decoder::Disassemble(void *codeStart, Addr codeLen, InstVisitor &visit
CASE
(
LDRSW_UIMM
)
CASE
(
STR_UIMM
)
CASE
(
STR_IMM
)
CASE
(
BR_BLR_RET
)
CASE
(
SUB_EXT_REG
)
CASE
(
SVC
)
CASE
(
EXCEPTION_GEN
)
CASE
(
STP_LDP
)
CASE
(
ADD_SUB_IMM
)
...
...
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.cpp
View file @
d714cd48
...
...
@@ -141,11 +141,11 @@ void A64_B_BL::Assemble() {
A64_CBZ_CBNZ
::
A64_CBZ_CBNZ
(
void
*
inst
)
:
A64_INST_PC_REL
(
inst
)
{}
A64_CBZ_CBNZ
::
A64_CBZ_CBNZ
(
A64_CBZ_CBNZ
::
OP
op
,
Off
offset
,
RegisterA64
&
rt
)
:
op
(
op
),
offset
(
offset
),
rt
(
&
rt
)
{}
offset
(
offset
),
rt
(
&
rt
)
{}
A64_CBZ_CBNZ
::
A64_CBZ_CBNZ
(
A64_CBZ_CBNZ
::
OP
op
,
Label
*
label
,
RegisterA64
&
rt
)
:
op
(
op
),
rt
(
&
rt
)
{
rt
(
&
rt
)
{
BindLabel
(
label
);
}
...
...
@@ -216,13 +216,13 @@ void A64_B_COND::OnOffsetApply(Off offset) {
A64_TBZ_TBNZ
::
A64_TBZ_TBNZ
(
void
*
inst
)
:
A64_INST_PC_REL
(
inst
)
{}
A64_TBZ_TBNZ
::
A64_TBZ_TBNZ
(
A64_TBZ_TBNZ
::
OP
op
,
RegisterA64
&
rt
,
U32
bit
,
Off
offset
)
:
op
(
op
),
rt
(
&
rt
),
bit
(
bit
),
offset
(
offset
)
{}
rt
(
&
rt
),
bit
(
bit
),
offset
(
offset
)
{}
A64_TBZ_TBNZ
::
A64_TBZ_TBNZ
(
A64_TBZ_TBNZ
::
OP
op
,
RegisterA64
&
rt
,
U32
bit
,
Label
*
label
)
:
op
(
op
),
rt
(
&
rt
),
bit
(
bit
)
{
rt
(
&
rt
),
bit
(
bit
)
{
BindLabel
(
label
);
}
...
...
@@ -262,7 +262,7 @@ void A64_TBZ_TBNZ::OnOffsetApply(Off offset) {
A64_LDR_LIT
::
A64_LDR_LIT
(
void
*
inst
)
:
A64_INST_PC_REL
(
inst
)
{}
A64_LDR_LIT
::
A64_LDR_LIT
(
A64_LDR_LIT
::
OP
op
,
RegisterA64
&
rt
,
Off
offset
)
:
op
(
op
),
rt
(
&
rt
),
offset
(
offset
)
{}
offset
(
offset
)
{}
A64_LDR_LIT
::
A64_LDR_LIT
(
A64_LDR_LIT
::
OP
op
,
RegisterA64
&
rt
,
Label
*
label
)
:
op
(
op
),
rt
(
&
rt
)
{
BindLabel
(
label
);
...
...
@@ -459,8 +459,8 @@ void A64_MOV_REG::Assemble() {
A64_SUB_EXT_REG
::
A64_SUB_EXT_REG
(
void
*
inst
)
:
InstructionA64
(
inst
)
{}
A64_SUB_EXT_REG
::
A64_SUB_EXT_REG
(
RegisterA64
&
rd
,
RegisterA64
&
rn
,
const
Operand
&
operand
,
FlagsUpdate
flagsUpdate
)
:
rd
(
&
rd
),
rn
(
&
rn
),
operand
(
operand
),
flagsUpdate
(
flagsUpdate
)
{}
FlagsUpdate
flagsUpdate
)
:
rd
(
&
rd
),
rn
(
&
rn
),
operand
(
operand
),
flagsUpdate
(
flagsUpdate
)
{}
void
A64_SUB_EXT_REG
::
Disassemble
()
{
flagsUpdate
=
FlagsUpdate
(
Get
()
->
S
);
...
...
@@ -598,7 +598,7 @@ A64_LDR_UIMM::A64_LDR_UIMM(void *inst) : A64LoadAndStoreImm(inst) {
}
A64_LDR_UIMM
::
A64_LDR_UIMM
(
RegisterA64
&
rt
,
const
MemOperand
&
operand
)
:
A64LoadAndStoreImm
(
&
rt
,
operand
)
{}
operand
)
{}
void
A64_LDR_UIMM
::
Disassemble
()
{
regSize
=
RegSize
(
Get
()
->
size
);
...
...
@@ -696,7 +696,7 @@ void A64_LDRSW_IMM::Assemble() {
A64_LDRSW_UIMM
::
A64_LDRSW_UIMM
(
void
*
inst
)
:
A64_LDR_UIMM
(
inst
)
{}
A64_LDRSW_UIMM
::
A64_LDRSW_UIMM
(
XRegister
&
rt
,
const
MemOperand
&
operand
)
:
A64_LDR_UIMM
(
rt
,
operand
)
{}
operand
)
{}
void
A64_LDRSW_UIMM
::
Disassemble
()
{
DECODE_RT
(
XReg
);
...
...
@@ -721,8 +721,8 @@ A64_STP_LDP::A64_STP_LDP(void *inst) : InstructionA64(inst) {
}
A64_STP_LDP
::
A64_STP_LDP
(
OP
op
,
RegisterA64
&
rt1
,
RegisterA64
&
rt2
,
const
MemOperand
&
operand
)
:
op
(
op
),
rt1
(
&
rt1
),
rt2
(
&
rt2
),
operand
(
operand
)
{}
rt2
(
&
rt2
),
operand
(
operand
)
{}
void
A64_STP_LDP
::
Disassemble
()
{
DECODE_OP
;
...
...
@@ -779,7 +779,7 @@ A64_ADD_SUB_IMM::A64_ADD_SUB_IMM(void *inst) : InstructionA64(inst) {
}
A64_ADD_SUB_IMM
::
A64_ADD_SUB_IMM
(
A64_ADD_SUB_IMM
::
OP
op
,
A64_ADD_SUB_IMM
::
S
sign
,
RegisterA64
&
rd
,
const
Operand
&
operand
)
:
op
(
op
),
sign
(
sign
),
rd
(
&
rd
),
operand
(
operand
)
{}
const
Operand
&
operand
)
:
op
(
op
),
sign
(
sign
),
rd
(
&
rd
),
operand
(
operand
)
{}
void
A64_ADD_SUB_IMM
::
Disassemble
()
{
DECODE_OP
;
...
...
@@ -822,17 +822,17 @@ A64_MSR_MRS::A64_MSR_MRS(void *inst) : InstructionA64(inst) {
}
A64_MSR_MRS
::
A64_MSR_MRS
(
OP
op
,
SystemRegister
&
systemRegister
,
RegisterA64
&
rt
)
:
op
(
op
),
system_reg
(
&
systemRegister
),
rt
(
&
rt
)
{}
systemRegister
),
rt
(
&
rt
)
{}
void
A64_MSR_MRS
::
Disassemble
()
{
DECODE_OP
;
DECODE_RT
(
XReg
);
system_reg
->
value
=
static_cast
<
U16
>
(
Get
()
->
sysreg
);
system_reg
.
value
=
static_cast
<
U16
>
(
Get
()
->
sysreg
);
}
void
A64_MSR_MRS
::
Assemble
()
{
SET_OPCODE
(
MSR_MRS
);
ENCODE_OP
;
ENCODE_RT
;
Get
()
->
sysreg
=
system_reg
->
value
;
Get
()
->
sysreg
=
system_reg
.
value
;
}
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.h
View file @
d714cd48
...
...
@@ -753,7 +753,7 @@ namespace SandHook {
public
:
OP
op
;
SystemRegister
*
system_reg
;
SystemRegister
system_reg
{}
;
RegisterA64
*
rt
;
};
...
...
nativehook/src/main/cpp/archs/arm/arm64/register/register_arm64.h
View file @
d714cd48
...
...
@@ -28,7 +28,7 @@ namespace SandHook {
enum
RegisterType
{
// The kInvalid value is used to detect uninitialized static instances,
// which are always zero-initialized before any constructors are called.
kInvalid
=
0
,
kInvalid
=
0
,
kRegister
,
kVRegister
,
kFPRegister
=
kVRegister
,
...
...
@@ -99,6 +99,8 @@ namespace SandHook {
U16
op0
:
2
;
};
SystemRegister
()
{}
SystemRegister
(
U16
value
)
:
value
(
value
)
{}
SystemRegister
(
U16
op0
,
U16
op1
,
U16
crn
,
U16
crm
,
U16
op2
)
{
...
...
@@ -115,7 +117,7 @@ namespace SandHook {
}
bool
operator
!=
(
const
SystemRegister
&
rhs
)
const
{
return
!
(
rhs
==
*
this
)
;
return
value
!=
rhs
.
value
;
}
public
:
...
...
nativehook/src/main/cpp/decoder/decoder.cpp
View file @
d714cd48
...
...
@@ -12,12 +12,12 @@
using
namespace
SandHook
::
Decoder
;
bool
DefaultVisitor
::
Visit
(
BaseUnit
*
unit
,
void
*
pc
)
{
bool
res
=
visitor
(
unit
,
pc
);
bool
res
=
visitor
_
(
reinterpret_cast
<
BaseInst
*>
(
unit
)
,
pc
);
delete
unit
;
return
res
;
}
DefaultVisitor
::
DefaultVisitor
(
bool
(
*
visitor
)(
BaseUnit
*
,
void
*
))
:
visitor
(
visitor
)
{}
DefaultVisitor
::
DefaultVisitor
(
std
::
function
<
bool
(
BaseInst
*
inst
,
void
*
pc
)
>
visitor
)
:
visitor_
(
visitor
)
{}
//do not support now
InstDecoder
*
Disassembler
::
Get
(
Arch
arch
)
{
...
...
nativehook/src/main/cpp/includes/decoder.h
View file @
d714cd48
...
...
@@ -23,21 +23,21 @@ namespace SandHook {
class
DefaultVisitor
:
public
InstVisitor
{
public
:
DefaultVisitor
(
bool
(
*
visitor
)(
BaseUnit
*
,
void
*
)
);
DefaultVisitor
(
std
::
function
<
bool
(
BaseInst
*
inst
,
void
*
pc
)
>
visitor
);
bool
Visit
(
BaseUnit
*
unit
,
void
*
pc
)
override
;
private
:
bool
(
*
visitor
)(
BaseUnit
*
,
void
*
)
;
std
::
function
<
bool
(
BaseInst
*
inst
,
void
*
pc
)
>
visitor_
;
};
class
InstDecoder
{
public
:
virtual
void
Disassemble
(
void
*
code_start
,
Addr
code_len
,
InstVisitor
&
visitor
,
bool
only_pc_rel
=
false
)
=
0
;
inline
void
Disassemble
(
void
*
code
S
tart
,
Addr
codeLen
,
bool
(
*
visitor
)(
BaseUnit
*
,
void
*
)
,
bool
only_pc_rel
=
false
)
{
Ins
tVisitor
vis
=
DefaultVisitor
(
visitor
);
Disassemble
(
code
S
tart
,
codeLen
,
vis
,
only_pc_rel
);
inline
void
Disassemble
(
void
*
code
_s
tart
,
Addr
codeLen
,
std
::
function
<
bool
(
BaseInst
*
inst
,
void
*
pc
)
>
visitor
,
bool
only_pc_rel
=
false
)
{
Defaul
tVisitor
vis
=
DefaultVisitor
(
visitor
);
Disassemble
(
code
_s
tart
,
codeLen
,
vis
,
only_pc_rel
);
};
};
...
...
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