Commit e1b78388 authored by swift_gan's avatar swift_gan Committed by swift_gan

tweak inst struct

parent c178fa97
......@@ -34,6 +34,9 @@ include_directories(
src/main/cpp/decoder
src/main/cpp/elf
src/main/cpp/includes
src/main/cpp/archs/arm64/inst
src/main/cpp/archs/arm64/register
src/main/cpp/archs/arm64/decoder
)
# Searches for a specified prebuilt library and stores the path as a
......
......@@ -91,9 +91,9 @@ void A64_MOV_WIDE::decode(STRUCT_A64(MOV_WIDE) *inst) {
shift = static_cast<U8>(inst->hw * 16);
op = OP(inst->opc);
if (inst->sf == 1) {
rd = XRegister::get(static_cast<U8>(inst->rd));
rd = XReg(static_cast<U8>(inst->rd));
} else {
rd = WRegister::get(static_cast<U8>(inst->rd));
rd = WReg(static_cast<U8>(inst->rd));
}
}
......@@ -149,9 +149,9 @@ Off A64_CBZ_CBNZ::getImmPCOffset() {
void A64_CBZ_CBNZ::decode(STRUCT_A64(CBZ_CBNZ) *inst) {
op = OP(get()->op);
if (inst->sf == 1) {
rt = XRegister::get(static_cast<U8>(inst->rt));
rt = XReg(static_cast<U8>(inst->rt));
} else {
rt = WRegister::get(static_cast<U8>(inst->rt));
rt = WReg(static_cast<U8>(inst->rt));
}
offset = getImmPCOffset();
}
......@@ -215,9 +215,9 @@ Off A64_TBZ_TBNZ::getImmPCOffset() {
void A64_TBZ_TBNZ::decode(STRUCT_A64(TBZ_TBNZ) *inst) {
bit = COMBINE(inst->b5, inst->b40, 5);
if (inst->b5 == 1) {
rt = XRegister::get(static_cast<U8>(inst->rt));
rt = XReg(static_cast<U8>(inst->rt));
} else {
rt = WRegister::get(static_cast<U8>(inst->rt));
rt = WReg(static_cast<U8>(inst->rt));
}
op = OP(inst->op);
offset = getImmPCOffset();
......@@ -255,9 +255,9 @@ Off A64_LDR_LIT::getImmPCOffset() {
void A64_LDR_LIT::decode(STRUCT_A64(LDR_LIT) *inst) {
op = OP(inst->op);
if (op == LDR_W) {
rt = WRegister::get(static_cast<U8>(inst->rt));
rt = WReg(static_cast<U8>(inst->rt));
} else {
rt = XRegister::get(static_cast<U8>(inst->rt));
rt = XReg(static_cast<U8>(inst->rt));
}
offset = getImmPCOffset();
}
......@@ -301,9 +301,18 @@ AddrMode A64_STR_IMM::decodeAddrMode() {
}
void A64_STR_IMM::decode(STRUCT_A64(STR_IMM) *inst) {
Instruction::decode(inst);
imm32 = zeroExtend32(12, inst->imm12);
condition = Condition(inst->cond);
operand.addr_mode = decodeAddrMode();
index = inst->P == 1;
wback = inst->P == 1 || inst->W == 0;
add = inst->U == 0;
rt = XReg(static_cast<U8>(inst->rt));
operand.base = XReg(static_cast<U8>(inst->rn));
operand.offset = add ? imm32 : -imm32;
}
void A64_STR_IMM::assembler() {
INST_DCHECK(condition, Condition::nv)
......
......@@ -13,7 +13,7 @@
#define INST_A64(X) A64_##X
#define IS_OPCODE(RAW,OP) INST_A64(OP)::is(RAW);
#define IS_OPCODE(RAW,OP) INST_A64(OP)::is(RAW)
#define DEFINE_IS(X) \
......@@ -56,7 +56,7 @@ namespace SandHook {
U32 size() override;
static inline U32 extend32(unsigned int bits, U32 value) {
static inline U32 zeroExtend32(unsigned int bits, U32 value) {
return value << (32 - bits);
}
......@@ -109,7 +109,7 @@ namespace SandHook {
class MemOperand {
public:
inline explicit MemOperand(RegisterA64* base, S64 offset = 0, AddrMode addr_mode = Offset)
inline explicit MemOperand(RegisterA64* base, Off offset = 0, AddrMode addr_mode = Offset)
: base(base), reg_offset(&UnknowRegiser), offset(offset), addr_mode(addr_mode), shift(NO_SHIFT),
extend(NO_EXTEND), shift_extend_imm(0) {}
......@@ -150,7 +150,7 @@ namespace SandHook {
public:
RegisterA64* base;
RegisterA64* reg_offset;
S64 offset;
Off offset;
AddrMode addr_mode;
Shift shift;
Extend extend;
......@@ -468,7 +468,7 @@ namespace SandHook {
A64_STR_IMM(Condition condition, RegisterA64 &rt, const MemOperand &operand);
DEFINE_IS_EXT(STR_IMM, TEST_INST_FIELD(unkown1_0,0) && TEST_INST_FIELD(unkown2_0,0))
DEFINE_IS_EXT(STR_IMM, TEST_INST_FIELD(unkown1_0, 0) && TEST_INST_FIELD(unkown2_0, 0))
void decode(STRUCT_A64(STR_IMM) *inst) override;
......@@ -488,7 +488,8 @@ namespace SandHook {
private:
bool wback;
U32 imm32;
bool add;
bool index;
};
}
......
......@@ -86,90 +86,98 @@ enum Extend {
SXTX = 7
};
//ok
#define IMM_LO_W 2
#define IMM_HI_W 19
DEFINE_OPCODE(ADR_ADRP, 0b10000)
struct STRUCT_A64(ADR_ADRP) {
InstA64 op:1;
InstA64 immlo:IMM_LO_W;
InstA64 opcode:5;
InstA64 immhi:IMM_HI_W;
InstA64 rd:5;
InstA64 immhi:IMM_HI_W;
InstA64 opcode:5;
InstA64 immlo:IMM_LO_W;
InstA64 op:1;
};
//ok
DEFINE_OPCODE(MOV_WIDE, 0b100101)
struct STRUCT_A64(MOV_WIDE) {
InstA64 sf:1;
InstA64 opc:2;
InstA64 opcode:6;
InstA64 hw:2;
InstA64 imm16:16;
InstA64 rd:5;
InstA64 imm16:16;
InstA64 hw:2;
InstA64 opcode:6;
InstA64 opc:2;
InstA64 sf:1;
};
//ok
DEFINE_OPCODE(B_BL, 0b00101)
struct STRUCT_A64(B_BL) {
InstA64 op:1;
InstA64 opcode:5;
InstA64 imm26:26;
InstA64 opcode:5;
InstA64 op:1;
};
//ok
DEFINE_OPCODE(CBZ_CBNZ, 0b011010)
struct STRUCT_A64(CBZ_CBNZ) {
InstA64 sf:1;
InstA64 opcode:6;
InstA64 op:1;
InstA64 imm19:19;
InstA64 rt:5;
InstA64 imm19:19;
InstA64 op:1;
InstA64 opcode:6;
InstA64 sf:1;
};
//ok
DEFINE_OPCODE(B_COND, 0b01010100)
struct STRUCT_A64(B_COND) {
InstA64 opcode:8;
InstA64 imm19:19;
InstA64 unkown:1;
InstA64 cond:4;
InstA64 unkown:1;
InstA64 imm19:19;
InstA64 opcode:8;
};
//ok
DEFINE_OPCODE(TBZ_TBNZ, 0b011011)
struct STRUCT_A64(TBZ_TBNZ) {
InstA64 b5:1;
InstA64 opcode:6;
InstA64 op:1;
InstA64 b40:5;
InstA64 imm14:14;
InstA64 rt:5;
InstA64 imm14:14;
InstA64 b40:5;
InstA64 op:1;
InstA64 opcode:6;
InstA64 b5:1;
};
//ok
DEFINE_OPCODE(LDR_LIT, 0b011000)
struct STRUCT_A64(LDR_LIT) {
InstA64 op:2;
InstA64 opcode:6;
InstA64 imm19:1;
InstA64 rt:5;
InstA64 imm19:19;
InstA64 opcode:6;
InstA64 op:2;
};
//ok
DEFINE_OPCODE(STR_IMM, 0b011)
struct STRUCT_A64(STR_IMM) {
InstA64 cond:4;
InstA64 opcode:3;
InstA64 P:1;
InstA64 U:1;
InstA64 unkown1_0:1;
InstA64 W:1;
InstA64 unkown2_0:1;
InstA64 rn:4;
InstA64 rt:4;
InstA64 imm12:12;
InstA64 rt:4;
InstA64 rn:4;
InstA64 unkown2_0:1;
InstA64 W:1;
InstA64 unkown1_0:1;
InstA64 U:1;
InstA64 P:1;
InstA64 opcode:3;
InstA64 cond:4;
};
//ok
DEFINE_OPCODE(BR, 0b00101)
struct STRUCT_A64(BR) {
InstA64 op:1;
InstA64 opcode:5;
InstA64 imm26:26;
InstA64 opcode:5;
InstA64 op:1;
};
......
......@@ -18,4 +18,4 @@ XRegister LR = X30;
//zero reg
XRegister XZR = X31;
WRegister WZR = W31;
RegisterA64 UnknowRegiser = RegisterA64(250);
\ No newline at end of file
RegisterA64 UnknowRegiser = RegisterA64(38);
\ No newline at end of file
......@@ -28,6 +28,11 @@ CHECK(X,V, valid = false;)
#define INST_DCHECK(X,V) \
DCHECK(X,V, valid = false;)
#define INST_ASSERT(COND) \
if (COND) { \
valid = false; \
}
namespace SandHook {
namespace Asm {
......
......@@ -2,4 +2,36 @@
// Created by SwiftGan on 2019/4/15.
//
#include "sandhook_native.h"
\ No newline at end of file
#include <jni.h>
#include "sandhook_native.h"
#include "inst_arm64.h"
void do2() {
}
void do1() {
do2();
}
extern "C"
JNIEXPORT void JNICALL
Java_com_swift_sandhook_nativehook_NativeHook_test(JNIEnv *env, jclass jclass1) {
do1();
U8 s = sizeof(STRUCT_A64(B_BL));
union {
InstA64 raw = 0x58001001;
STRUCT_A64(LDR_LIT) bl;
} test;
STRUCT_A64(LDR_LIT) bl = test.bl;
A64_LDR_LIT a64ldr(&bl);
Off off = a64ldr.offset;
}
\ No newline at end of file
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment