Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Contribute to GitLab
Sign in / Register
Toggle navigation
S
SandHook
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
Administrator
SandHook
Commits
e8aa714a
Commit
e8aa714a
authored
May 31, 2019
by
swift_gan
Committed by
swift_gan
May 31, 2019
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
[NativeHook]fix some inst a64
parent
627b057f
Hide whitespace changes
Inline
Side-by-side
Showing
5 changed files
with
10 additions
and
10 deletions
+10
-10
assembler_arm64.cpp
...rc/main/cpp/archs/arm/arm64/assembler/assembler_arm64.cpp
+1
-1
hook_arm64.cpp
nativehook/src/main/cpp/archs/arm/arm64/hook/hook_arm64.cpp
+2
-2
inst_arm64.cpp
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.cpp
+4
-4
inst_arm64.h
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.h
+2
-2
inst_struct_aarch64.h
...k/src/main/cpp/archs/arm/arm64/inst/inst_struct_aarch64.h
+1
-1
No files found.
nativehook/src/main/cpp/archs/arm/arm64/assembler/assembler_arm64.cpp
View file @
e8aa714a
...
...
@@ -158,7 +158,7 @@ void AssemblerA64::Str(RegisterA64 &rt, const MemOperand& memOperand) {
}
void
AssemblerA64
::
Ldr
(
RegisterA64
&
rt
,
const
MemOperand
&
memOperand
)
{
if
(
memOperand
.
addr_mode
==
Offset
)
{
if
(
memOperand
.
addr_mode
==
Offset
&&
memOperand
.
offset
>=
0
)
{
Emit
(
reinterpret_cast
<
Unit
<
Base
>
*>
(
new
INST_A64
(
LDR_UIMM
)(
rt
,
memOperand
)));
}
else
{
Emit
(
reinterpret_cast
<
Unit
<
Base
>
*>
(
new
INST_A64
(
LDR_IMM
)(
rt
,
memOperand
)));
...
...
nativehook/src/main/cpp/archs/arm/arm64/hook/hook_arm64.cpp
View file @
e8aa714a
...
...
@@ -91,7 +91,7 @@ bool InlineHookArm64Android::breakPoint(void *point, void (*callback)(REG regs[]
U8
douRegCount
=
30
/
2
;
__
Sub
(
SP
,
Operand
(
&
SP
,
0xf0
));
for
(
int
i
=
0
;
i
<
douRegCount
;
++
i
)
{
__
Stp
(
*
XReg
(
i
),
*
XReg
(
i
+
1
),
MemOperand
(
&
SP
,
i
*
16
));
__
Stp
(
*
XReg
(
2
*
i
),
*
XReg
(
2
*
i
+
1
),
MemOperand
(
&
SP
,
i
*
16
));
}
__
Mov
(
X0
,
SP
);
...
...
@@ -102,7 +102,7 @@ bool InlineHookArm64Android::breakPoint(void *point, void (*callback)(REG regs[]
//restore X0 - X29
for
(
int
i
=
0
;
i
<
douRegCount
;
++
i
)
{
__
Ldp
(
*
XReg
(
i
),
*
XReg
(
i
+
1
),
MemOperand
(
&
SP
,
i
*
16
));
__
Ldp
(
*
XReg
(
2
*
i
),
*
XReg
(
2
*
i
+
1
),
MemOperand
(
&
SP
,
i
*
16
));
}
__
Add
(
SP
,
Operand
(
&
SP
,
0xf0
));
...
...
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.cpp
View file @
e8aa714a
...
...
@@ -873,9 +873,9 @@ void A64_ADD_SUB_IMM::decode(A64_STRUCT_ADD_SUB_IMM *inst) {
sign
=
S
(
inst
->
S
);
DECODE_SHIFT
;
if
(
operand
.
shift
==
LSL
)
{
operand
.
immediate
=
get
()
->
imm12
;
operand
.
shift_extend_imm
=
get
()
->
imm12
;
}
else
if
(
operand
.
shift
==
LSR
)
{
operand
.
immediate
=
get
()
->
imm12
<<
12
;
operand
.
shift_extend_imm
=
get
()
->
imm12
<<
12
;
}
else
{
valid
=
false
;
}
...
...
@@ -890,9 +890,9 @@ void A64_ADD_SUB_IMM::assembler() {
get
()
->
S
=
sign
;
ENCODE_SHIFT
;
if
(
operand
.
shift
==
LSL
)
{
get
()
->
imm12
=
static_cast
<
InstA64
>
(
operand
.
immediate
)
;
get
()
->
imm12
=
operand
.
shift_extend_imm
;
}
else
if
(
operand
.
shift
==
LSR
)
{
get
()
->
imm12
=
static_cast
<
InstA64
>
(
operand
.
immediate
)
>>
12
;
get
()
->
imm12
=
operand
.
shift_extend_imm
>>
12
;
}
else
{
valid
=
false
;
}
...
...
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.h
View file @
e8aa714a
...
...
@@ -789,8 +789,8 @@ namespace SandHook {
};
enum
S
{
Sign
=
0
b
0
,
UnSign
=
0
b
1
Sign
=
0
b
1
,
UnSign
=
0
b
0
};
enum
Size
{
...
...
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_struct_aarch64.h
View file @
e8aa714a
...
...
@@ -222,7 +222,7 @@ DEFINE_STRUCT_A64(ADD_SUB_IMM) {
InstA64
imm12
:
12
;
InstA64
shift
:
2
;
InstA64
opcode
:
5
;
InstA64
S
:
2
;
InstA64
S
:
1
;
InstA64
op
:
1
;
InstA64
sf
:
1
;
};
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment