Commit 44b68896 authored by swift_gan's avatar swift_gan

add inst type

parent 852ee689
...@@ -73,7 +73,7 @@ void A64_ADR_ADRP::assembler() { ...@@ -73,7 +73,7 @@ void A64_ADR_ADRP::assembler() {
A64_MOV_WIDE::A64_MOV_WIDE() {} A64_MOV_WIDE::A64_MOV_WIDE() {}
A64_MOV_WIDE::A64_MOV_WIDE(aarch64_mov_wide *inst) : InstructionA64(inst) { A64_MOV_WIDE::A64_MOV_WIDE(STRUCT_A64(MOV_WIDE) *inst) : InstructionA64(inst) {
decode(inst); decode(inst);
} }
...@@ -91,7 +91,7 @@ void A64_MOV_WIDE::assembler() { ...@@ -91,7 +91,7 @@ void A64_MOV_WIDE::assembler() {
get()->rd = rd->getCode(); get()->rd = rd->getCode();
} }
void A64_MOV_WIDE::decode(aarch64_mov_wide *inst) { void A64_MOV_WIDE::decode(STRUCT_A64(MOV_WIDE) *inst) {
imme = static_cast<U16>(inst->imm16); imme = static_cast<U16>(inst->imm16);
shift = static_cast<U8>(inst->hw * 16); shift = static_cast<U8>(inst->hw * 16);
op = OP(inst->opc); op = OP(inst->opc);
...@@ -108,7 +108,7 @@ void A64_MOV_WIDE::decode(aarch64_mov_wide *inst) { ...@@ -108,7 +108,7 @@ void A64_MOV_WIDE::decode(aarch64_mov_wide *inst) {
A64_B_BL::A64_B_BL() {} A64_B_BL::A64_B_BL() {}
A64_B_BL::A64_B_BL(aarch64_b_bl *inst) : A64_INST_PC_REL(inst) { A64_B_BL::A64_B_BL(STRUCT_A64(B_BL) *inst) : A64_INST_PC_REL(inst) {
decode(inst); decode(inst);
} }
...@@ -120,7 +120,7 @@ ADDR A64_B_BL::getImmPCOffset() { ...@@ -120,7 +120,7 @@ ADDR A64_B_BL::getImmPCOffset() {
return signExtend64(26 + 2, COMBINE(get()->imm26, 0b00, 2)); return signExtend64(26 + 2, COMBINE(get()->imm26, 0b00, 2));
} }
void A64_B_BL::decode(aarch64_b_bl *inst) { void A64_B_BL::decode(STRUCT_A64(B_BL) *inst) {
op = OP(inst->op); op = OP(inst->op);
offset = getImmPCOffset(); offset = getImmPCOffset();
} }
...@@ -233,6 +233,6 @@ void A64_TBZ_TBNZ::assembler() { ...@@ -233,6 +233,6 @@ void A64_TBZ_TBNZ::assembler() {
get()->op = op; get()->op = op;
get()->b5 = rt->is64Bit() ? 1 : 0; get()->b5 = rt->is64Bit() ? 1 : 0;
get()->rt = rt->getCode(); get()->rt = rt->getCode();
get()->b40 = BITS(bit, sizeof(U32) - 5, sizeof(U32)); get()->b40 = static_cast<InstA64>(BITS(bit, sizeof(InstA64) - 5, sizeof(InstA64)));
get()->imm14 = TruncateToUint14(offset); get()->imm14 = TruncateToUint14(offset);
} }
\ No newline at end of file
...@@ -124,7 +124,7 @@ namespace SandHook { ...@@ -124,7 +124,7 @@ namespace SandHook {
class INST_A64(MOV_WIDE) : public InstructionA64<aarch64_mov_wide> { class INST_A64(MOV_WIDE) : public InstructionA64<STRUCT_A64(MOV_WIDE)> {
public: public:
enum OP { enum OP {
...@@ -138,10 +138,12 @@ namespace SandHook { ...@@ -138,10 +138,12 @@ namespace SandHook {
A64_MOV_WIDE(); A64_MOV_WIDE();
A64_MOV_WIDE(aarch64_mov_wide *inst); A64_MOV_WIDE(STRUCT_A64(MOV_WIDE) *inst);
A64_MOV_WIDE(A64_MOV_WIDE::OP op, RegisterA64* rd, U16 imme, U8 shift); A64_MOV_WIDE(A64_MOV_WIDE::OP op, RegisterA64* rd, U16 imme, U8 shift);
DEFINE_IS(MOV_WIDE)
inline U32 instCode() override { inline U32 instCode() override {
switch (op) { switch (op) {
case MOV_WideOp_K: case MOV_WideOp_K:
...@@ -157,7 +159,7 @@ namespace SandHook { ...@@ -157,7 +159,7 @@ namespace SandHook {
void assembler() override; void assembler() override;
void decode(aarch64_mov_wide *decode) override; void decode(STRUCT_A64(MOV_WIDE) *decode) override;
inline U8 getShift() { inline U8 getShift() {
...@@ -187,7 +189,7 @@ namespace SandHook { ...@@ -187,7 +189,7 @@ namespace SandHook {
class INST_A64(B_BL) : public A64_INST_PC_REL<aarch64_b_bl> { class INST_A64(B_BL) : public A64_INST_PC_REL<STRUCT_A64(B_BL)> {
public: public:
enum OP { enum OP {
...@@ -197,7 +199,7 @@ namespace SandHook { ...@@ -197,7 +199,7 @@ namespace SandHook {
A64_B_BL(); A64_B_BL();
A64_B_BL(aarch64_b_bl *inst); A64_B_BL(STRUCT_A64(B_BL) *inst);
A64_B_BL(OP op, ADDR offset); A64_B_BL(OP op, ADDR offset);
...@@ -210,12 +212,12 @@ namespace SandHook { ...@@ -210,12 +212,12 @@ namespace SandHook {
} }
inline U32 instCode() override { inline U32 instCode() override {
return op == B ? UnconditionalBranchOp::B : UnconditionalBranchOp ::BL; return op == B ? UnconditionalBranchOp::B : UnconditionalBranchOp::BL;
}; };
ADDR getImmPCOffset() override; ADDR getImmPCOffset() override;
void decode(aarch64_b_bl *decode) override; void decode(STRUCT_A64(B_BL) *decode) override;
void assembler() override; void assembler() override;
......
...@@ -78,7 +78,7 @@ struct STRUCT_A64(ADR_ADRP) { ...@@ -78,7 +78,7 @@ struct STRUCT_A64(ADR_ADRP) {
DEFINE_OPCODE(MOV_WIDE, 0b100101) DEFINE_OPCODE(MOV_WIDE, 0b100101)
struct aarch64_mov_wide { struct STRUCT_A64(MOV_WIDE) {
InstA64 sf:1; InstA64 sf:1;
InstA64 opc:2; InstA64 opc:2;
InstA64 opcode:6; InstA64 opcode:6;
...@@ -88,7 +88,7 @@ struct aarch64_mov_wide { ...@@ -88,7 +88,7 @@ struct aarch64_mov_wide {
}; };
DEFINE_OPCODE(B_BL, 0b00101) DEFINE_OPCODE(B_BL, 0b00101)
struct aarch64_b_bl { struct STRUCT_A64(B_BL) {
InstA64 op:1; InstA64 op:1;
InstA64 opcode:5; InstA64 opcode:5;
InstA64 imm26:26; InstA64 imm26:26;
......
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