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SandHook
Commits
5c4ddbb7
Commit
5c4ddbb7
authored
May 21, 2019
by
swift_gan
Committed by
swift_gan
May 21, 2019
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[NativeHook]add assembler arm32
parent
60c8b84a
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Showing
11 changed files
with
160 additions
and
41 deletions
+160
-41
CMakeLists.txt
nativehook/CMakeLists.txt
+2
-0
assembler_a32.cpp
.../src/main/cpp/archs/arm/arm32/assembler/assembler_a32.cpp
+53
-0
assembler_a32.h
...ok/src/main/cpp/archs/arm/arm32/assembler/assembler_a32.h
+43
-0
inst_t16.h
nativehook/src/main/cpp/archs/arm/arm32/inst/inst_t16.h
+6
-0
inst_t32.h
nativehook/src/main/cpp/archs/arm/arm32/inst/inst_t32.h
+8
-1
assembler_a64.cpp
.../src/main/cpp/archs/arm/arm64/assembler/assembler_a64.cpp
+7
-2
assembler_a64.h
...ok/src/main/cpp/archs/arm/arm64/assembler/assembler_a64.h
+1
-1
inst_arm64.cpp
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.cpp
+4
-4
inst_arm64.h
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.h
+1
-7
register_list_a64.cpp
...c/main/cpp/archs/arm/arm64/register/register_list_a64.cpp
+12
-14
register_list_a64.h
...src/main/cpp/archs/arm/arm64/register/register_list_a64.h
+23
-12
No files found.
nativehook/CMakeLists.txt
View file @
5c4ddbb7
...
...
@@ -30,6 +30,7 @@ add_library( # Sets the name of the library.
src/main/cpp/archs/arm/arm32/inst/inst_t16.cpp
src/main/cpp/archs/arm/arm32/register/register_a32.cpp
src/main/cpp/archs/arm/arm32/register/register_list_a32.cpp
src/main/cpp/archs/arm/arm32/assembler/assembler_a32.cpp
src/main/cpp/relocate/code_relocate.cpp
src/main/cpp/elf/elf.cpp
src/main/cpp/assembler/assembler.cpp
...
...
@@ -54,6 +55,7 @@ include_directories(
src/main/cpp/archs/arm/arm64/relocate
src/main/cpp/archs/arm/arm32/inst
src/main/cpp/archs/arm/arm32/register
src/main/cpp/archs/arm/arm32/assembler
)
# Searches for a specified prebuilt library and stores the path as a
...
...
nativehook/src/main/cpp/archs/arm/arm32/assembler/assembler_a32.cpp
0 → 100644
View file @
5c4ddbb7
//
// Created by swift on 2019/5/22.
//
#include "assembler_a32.h"
using
namespace
SandHook
::
Assembler
;
using
namespace
SandHook
::
RegistersA32
;
using
namespace
SandHook
::
AsmA32
;
AssemblerA32
::
AssemblerA32
(
CodeBuffer
*
codeBuffer
)
{
codeContainer
.
setCodeBuffer
(
codeBuffer
);
}
void
*
AssemblerA32
::
getPC
()
{
return
reinterpret_cast
<
void
*>
(
codeContainer
.
curPc
);
}
void
*
AssemblerA32
::
getStartPC
()
{
return
reinterpret_cast
<
void
*>
(
codeContainer
.
startPc
);
}
void
AssemblerA32
::
allocBufferFirst
(
U32
size
)
{
codeContainer
.
allocBufferFirst
(
size
);
}
void
*
AssemblerA32
::
finish
()
{
codeContainer
.
commit
();
return
reinterpret_cast
<
void
*>
(
codeContainer
.
startPc
);
}
void
AssemblerA32
::
Emit
(
U32
data32
)
{
Emit
(
reinterpret_cast
<
Unit
<
Base
>*>
(
new
Data32
(
data32
)));
}
void
AssemblerA32
::
Emit
(
Unit
<
Base
>
*
unit
)
{
codeContainer
.
append
(
unit
);
}
void
AssemblerA32
::
Mov
(
RegisterA32
&
rd
,
U16
imm16
)
{
Emit
(
reinterpret_cast
<
Unit
<
Base
>*>
(
new
INST_T32
(
MOV_MOVT_IMM
)(
INST_T32
(
MOV_MOVT_IMM
)
::
MOV
,
&
rd
,
imm16
)));
}
void
AssemblerA32
::
Movt
(
RegisterA32
&
rd
,
U16
imm16
)
{
Emit
(
reinterpret_cast
<
Unit
<
Base
>*>
(
new
INST_T32
(
MOV_MOVT_IMM
)(
INST_T32
(
MOV_MOVT_IMM
)
::
MOVT
,
&
rd
,
imm16
)));
}
void
AssemblerA32
::
Mov
(
RegisterA32
&
rd
,
U32
imm32
)
{
U16
immH
=
BITS16H
(
imm32
);
U16
immL
=
BITS16L
(
imm32
);
Mov
(
rd
,
immL
);
Movt
(
rd
,
immH
);
}
nativehook/src/main/cpp/archs/arm/arm32/assembler/assembler_a32.h
0 → 100644
View file @
5c4ddbb7
//
// Created by swift on 2019/5/22.
//
#ifndef SANDHOOK_ASSEMBLER_A32_H
#define SANDHOOK_ASSEMBLER_A32_H
#include "assembler.h"
#include "register_a32.h"
#include "inst_t16.h"
#include "inst_t32.h"
using
namespace
SandHook
::
AsmA32
;
namespace
SandHook
{
namespace
Assembler
{
class
AssemblerA32
{
public
:
AssemblerA32
(
CodeBuffer
*
codeBuffer
);
void
allocBufferFirst
(
U32
size
);
void
*
getStartPC
();
void
*
getPC
();
void
*
finish
();
void
Emit
(
U32
data32
);
void
Emit
(
Unit
<
Base
>*
unit
);
void
Mov
(
RegisterA32
&
rd
,
U16
imm16
);
void
Movt
(
RegisterA32
&
rd
,
U16
imm16
);
void
Mov
(
RegisterA32
&
rd
,
U32
imm32
);
public
:
CodeContainer
codeContainer
=
CodeContainer
(
nullptr
);
};
}
}
#endif //SANDHOOK_ASSEMBLER_A32_H
nativehook/src/main/cpp/archs/arm/arm32/inst/inst_t16.h
View file @
5c4ddbb7
...
...
@@ -337,4 +337,10 @@ namespace SandHook {
}
}
#undef DEFINE_IS_EXT
#undef DEFINE_IS
#undef TEST_INST_FIELD
#undef TEST_INST_OPCODE
#undef DEFINE_INST_CODE
#endif //SANDHOOK_INST_T16_H
nativehook/src/main/cpp/archs/arm/arm32/inst/inst_t32.h
View file @
5c4ddbb7
...
...
@@ -14,7 +14,7 @@
#define INST_T32(X) T32_##X
#define IS_OPCODE_T
16
(RAW,OP) INST_T32(OP)::is(RAW)
#define IS_OPCODE_T
32
(RAW,OP) INST_T32(OP)::is(RAW)
#define DEFINE_IS_EXT(X, COND) \
inline static bool is(InstT16& inst) { \
...
...
@@ -257,4 +257,11 @@ namespace SandHook {
}
}
#undef DEFINE_IS_EXT
#undef DEFINE_IS
#undef TEST_INST_FIELD
#undef TEST_INST_OPCODE
#undef DEFINE_INST_CODE
#endif //SANDHOOK_INST_T32_H
nativehook/src/main/cpp/archs/arm/arm64/assembler/assembler_a64.cpp
View file @
5c4ddbb7
...
...
@@ -42,8 +42,7 @@ void AssemblerA64::Emit(Unit<Base> *unit) {
codeContainer
.
append
(
unit
);
}
void
AssemblerA64
::
MoveWide
(
RegisterA64
&
rd
,
INST_A64
(
MOV_WIDE
)
::
OP
op
,
U64
imme
,
void
AssemblerA64
::
MoveWide
(
RegisterA64
&
rd
,
INST_A64
(
MOV_WIDE
)
::
OP
op
,
U64
imme
,
INST_A64
(
MOV_WIDE
)
::
Shift
shift
)
{
Emit
(
reinterpret_cast
<
Unit
<
Base
>
*>
(
new
INST_A64
(
MOV_WIDE
)(
op
,
&
rd
,
imme
,
shift
)));
}
...
...
@@ -201,7 +200,13 @@ void AssemblerA64::Push(RegisterA64 &rt) {
}
void
AssemblerA64
::
Cmp
(
RegisterA64
&
rn
,
const
Operand
&
operand
)
{
Subs
(
*
zeroRegFor
(
rn
),
rn
,
operand
);
}
void
AssemblerA64
::
Subs
(
RegisterA64
&
rd
,
RegisterA64
&
rn
,
const
Operand
&
operand
)
{
Emit
(
reinterpret_cast
<
Unit
<
Base
>
*>
(
new
INST_A64
(
SUB_EXT_REG
)(
rd
,
rn
,
operand
,
SetFlags
)));
}
nativehook/src/main/cpp/archs/arm/arm64/assembler/assembler_a64.h
View file @
5c4ddbb7
...
...
@@ -71,7 +71,7 @@ namespace SandHook {
void
Pop
(
RegisterA64
&
rt
);
void
Push
(
RegisterA64
&
rt
);
void
Subs
();
void
Subs
(
RegisterA64
&
rd
,
RegisterA64
&
rn
,
const
Operand
&
operand
);
void
Cmp
(
RegisterA64
&
rn
,
const
Operand
&
operand
);
...
...
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.cpp
View file @
5c4ddbb7
...
...
@@ -517,12 +517,12 @@ A64_SUB_EXT_REG::A64_SUB_EXT_REG(STRUCT_A64(SUB_EXT_REG) &inst) : InstructionA64
decode
(
&
inst
);
}
A64_SUB_EXT_REG
::
A64_SUB_EXT_REG
(
S
s
,
RegisterA64
&
rd
,
RegisterA64
&
rn
,
const
Operand
&
operand
,
FlagsUpdate
flagsUpdate
)
:
s
(
s
),
rd
(
&
rd
),
rn
(
&
rn
),
operand
(
operand
),
A64_SUB_EXT_REG
::
A64_SUB_EXT_REG
(
RegisterA64
&
rd
,
RegisterA64
&
rn
,
const
Operand
&
operand
,
FlagsUpdate
flagsUpdate
)
:
rd
(
&
rd
),
rn
(
&
rn
),
operand
(
operand
),
flagsUpdate
(
flagsUpdate
)
{}
void
A64_SUB_EXT_REG
::
decode
(
STRUCT_A64
(
SUB_EXT_REG
)
*
inst
)
{
s
=
S
(
inst
->
S
);
flagsUpdate
=
FlagsUpdate
(
inst
->
S
);
if
(
inst
->
sf
==
1
)
{
DECODE_RD
(
XReg
);
DECODE_RN
(
XReg
);
...
...
@@ -540,7 +540,7 @@ void A64_SUB_EXT_REG::decode(STRUCT_A64(SUB_EXT_REG) *inst) {
void
A64_SUB_EXT_REG
::
assembler
()
{
SET_OPCODE_MULTI
(
SUB_EXT_REG
,
1
);
SET_OPCODE_MULTI
(
SUB_EXT_REG
,
2
);
get
()
->
S
=
s
;
get
()
->
S
=
flagsUpdate
;
get
()
->
sf
=
rd
->
isX
()
?
1
:
0
;
get
()
->
option
=
operand
.
extend
;
get
()
->
imm3
=
operand
.
shift
;
...
...
nativehook/src/main/cpp/archs/arm/arm64/inst/inst_arm64.h
View file @
5c4ddbb7
...
...
@@ -616,16 +616,11 @@ namespace SandHook {
class
INST_A64
(
SUB_EXT_REG
)
:
public
InstructionA64
<
STRUCT_A64
(
SUB_EXT_REG
)
>
{
public
:
enum
S
{
Unsign
=
0
b0
,
Sign
=
0
b1
,
};
A64_SUB_EXT_REG
();
A64_SUB_EXT_REG
(
STRUCT_A64
(
SUB_EXT_REG
)
&
inst
);
A64_SUB_EXT_REG
(
S
s
,
RegisterA64
&
rd
,
RegisterA64
&
rn
,
const
Operand
&
operand
,
A64_SUB_EXT_REG
(
RegisterA64
&
rd
,
RegisterA64
&
rn
,
const
Operand
&
operand
,
FlagsUpdate
flagsUpdate
);
DEFINE_IS_EXT
(
SUB_EXT_REG
,
TEST_INST_OPCODE
(
SUB_EXT_REG
,
1
)
&&
TEST_INST_OPCODE
(
SUB_EXT_REG
,
2
))
...
...
@@ -638,7 +633,6 @@ namespace SandHook {
public
:
S
s
;
RegisterA64
*
rd
;
RegisterA64
*
rn
;
Operand
operand
=
Operand
();
...
...
nativehook/src/main/cpp/archs/arm/arm64/register/register_list_a64.cpp
View file @
5c4ddbb7
...
...
@@ -6,23 +6,21 @@
namespace
SandHook
{
namespace
RegistersA64
{
namespace
RegistersA64
{
#define INIT_REGISTERS(N) \
WRegister W##N = WRegister(N); \
XRegister X##N = XRegister(N);
AARCH64_REGISTER_CODE_LIST
(
INIT_REGISTERS
)
AARCH64_REGISTER_CODE_LIST
(
INIT_REGISTERS
)
#undef INIT_REGISTERS
WRegister
WSP
=
WRegister
(
RegisterA64
::
kSPRegInternalCode
);
XRegister
SP
=
XRegister
(
RegisterA64
::
kSPRegInternalCode
);
XRegister
IP0
=
X16
;
XRegister
IP1
=
X17
;
XRegister
LR
=
X30
;
WRegister
WSP
=
WRegister
(
RegisterA64
::
kSPRegInternalCode
);
XRegister
SP
=
XRegister
(
RegisterA64
::
kSPRegInternalCode
);
XRegister
IP0
=
X16
;
XRegister
IP1
=
X17
;
XRegister
LR
=
X30
;
//zero reg
XRegister
XZR
=
X31
;
WRegister
WZR
=
W31
;
RegisterA64
UnknowRegiser
=
RegisterA64
(
38
);
}
}
//cmp....
#define ZeroRegFor(X) X.isX() ? XZR : WZR
\ No newline at end of file
XRegister
XZR
=
X31
;
WRegister
WZR
=
W31
;
RegisterA64
UnknowRegiser
=
RegisterA64
(
38
);
}
}
\ No newline at end of file
nativehook/src/main/cpp/archs/arm/arm64/register/register_list_a64.h
View file @
5c4ddbb7
...
...
@@ -10,7 +10,7 @@
using
namespace
SandHook
::
Asm
;
// clang-format off
// clang-format off
#define AARCH64_REGISTER_COUNT 32
#define AARCH64_REGISTER_CODE_LIST(R) \
...
...
@@ -21,24 +21,35 @@ using namespace SandHook::Asm;
namespace
SandHook
{
namespace
RegistersA64
{
namespace
RegistersA64
{
#define DEFINE_REGISTERS(N) \
extern WRegister W##N; \
extern XRegister X##N;
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
)
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
)
#undef DEFINE_REGISTERS
extern
WRegister
WSP
;
extern
XRegister
SP
;
extern
XRegister
IP0
;
extern
XRegister
IP1
;
extern
XRegister
LR
;
extern
WRegister
WSP
;
extern
XRegister
SP
;
extern
XRegister
IP0
;
extern
XRegister
IP1
;
extern
XRegister
LR
;
//zero reg
extern
XRegister
XZR
;
extern
WRegister
WZR
;
extern
RegisterA64
UnknowRegiser
;
}}
extern
XRegister
XZR
;
extern
WRegister
WZR
;
extern
RegisterA64
UnknowRegiser
;
//cmp....
inline
RegisterA64
*
zeroRegFor
(
RegisterA64
&
registerA64
)
{
if
(
registerA64
.
isX
())
{
return
&
XZR
;
}
else
{
return
&
WZR
;
}
}
}
}
#define XReg(N) XRegister::get(N)
#define WReg(N) WRegister::get(N)
...
...
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