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Administrator
SandHook
Commits
6b0d6bbf
Commit
6b0d6bbf
authored
May 09, 2019
by
swift_gan
Committed by
swift_gan
May 09, 2019
Browse files
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tweak code
parent
a495dc5c
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Showing
9 changed files
with
200 additions
and
38 deletions
+200
-38
CMakeLists.txt
nativehook/CMakeLists.txt
+1
-0
inst_arm64.cpp
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.cpp
+13
-1
inst_arm64.h
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.h
+119
-10
register_a64.cpp
...vehook/src/main/cpp/archs/arm64/register/register_a64.cpp
+6
-6
register_a64.h
nativehook/src/main/cpp/archs/arm64/register/register_a64.h
+0
-11
register_list_a64.cpp
...k/src/main/cpp/archs/arm64/register/register_list_a64.cpp
+21
-0
register_list_a64.h
...ook/src/main/cpp/archs/arm64/register/register_list_a64.h
+23
-10
register.h
nativehook/src/main/cpp/asm/register.h
+12
-0
base.h
nativehook/src/main/cpp/includes/base.h
+5
-0
No files found.
nativehook/CMakeLists.txt
View file @
6b0d6bbf
...
@@ -21,6 +21,7 @@ add_library( # Sets the name of the library.
...
@@ -21,6 +21,7 @@ add_library( # Sets the name of the library.
src/main/cpp/decoder/decoder.cpp
src/main/cpp/decoder/decoder.cpp
src/main/cpp/archs/arm64/inst/inst_arm64.cpp
src/main/cpp/archs/arm64/inst/inst_arm64.cpp
src/main/cpp/archs/arm64/register/register_a64.cpp
src/main/cpp/archs/arm64/register/register_a64.cpp
src/main/cpp/archs/arm64/register/register_list_a64.cpp
src/main/cpp/archs/arm64/decoder/decoder_arm64.cpp
src/main/cpp/archs/arm64/decoder/decoder_arm64.cpp
)
)
...
...
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.cpp
View file @
6b0d6bbf
...
@@ -3,7 +3,6 @@
...
@@ -3,7 +3,6 @@
//
//
#include "inst_arm64.h"
#include "inst_arm64.h"
#include "../register/register_a64.h"
#define SET_OPCODE(X) get()->opcode = OPCODE_A64(X)
#define SET_OPCODE(X) get()->opcode = OPCODE_A64(X)
...
@@ -273,3 +272,16 @@ void A64_LDR_LIT::assembler() {
...
@@ -273,3 +272,16 @@ void A64_LDR_LIT::assembler() {
get
()
->
op
=
op
;
get
()
->
op
=
op
;
get
()
->
imm19
=
TruncateToUint19
(
offset
);
get
()
->
imm19
=
TruncateToUint19
(
offset
);
}
}
// STR IMM
A64_STR_IMM
::
A64_STR_IMM
()
{}
A64_STR_IMM
::
A64_STR_IMM
(
A64_STRUCT_STR_IMM
*
inst
)
:
InstructionA64
(
inst
)
{
decode
(
inst
);
}
A64_STR_IMM
::
A64_STR_IMM
(
RegisterA64
*
rt
,
const
MemOperand
&
oprand
)
:
rt
(
rt
),
oprand
(
oprand
)
{
assembler
();
}
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.h
View file @
6b0d6bbf
...
@@ -5,12 +5,10 @@
...
@@ -5,12 +5,10 @@
#ifndef SANDHOOK_NH_INST_ARM64_H
#ifndef SANDHOOK_NH_INST_ARM64_H
#define SANDHOOK_NH_INST_ARM64_H
#define SANDHOOK_NH_INST_ARM64_H
#include <register.h>
#include "inst_struct_aarch64.h"
#include "inst_struct_aarch64.h"
#include "../../../asm/instruction.h"
#include "../../../asm/instruction.h"
#include "../../../includes/base.h"
#include "../../../includes/base.h"
#include "../register/register_a64.h"
#include "../register/register_list_a64.h"
#include "../../../../../../../hooklib/src/main/cpp/includes/inst.h"
#define INST_A64(X) A64_##X
#define INST_A64(X) A64_##X
...
@@ -71,6 +69,102 @@ namespace SandHook {
...
@@ -71,6 +69,102 @@ namespace SandHook {
enum
AddrMode
{
Offset
,
PreIndex
,
PostIndex
};
enum
AddrMode
{
Offset
,
PreIndex
,
PostIndex
};
class
Operand
{
public
:
inline
explicit
Operand
(
S64
imm
)
:
immediate_
(
imm
),
reg_
(
&
UnknowRegiser
),
shift_
(
NO_SHIFT
),
extend_
(
NO_EXTEND
),
shift_extent_imm_
(
0
)
{}
inline
Operand
(
RegisterA64
*
reg
,
Shift
shift
=
LSL
,
int32_t
imm
=
0
)
:
immediate_
(
0
),
reg_
(
reg
),
shift_
(
shift
),
extend_
(
NO_EXTEND
),
shift_extent_imm_
(
imm
)
{}
inline
Operand
(
RegisterA64
*
reg
,
Extend
extend
,
int32_t
imm
=
0
)
:
immediate_
(
0
),
reg_
(
reg
),
shift_
(
NO_SHIFT
),
extend_
(
extend
),
shift_extent_imm_
(
imm
)
{}
// =====
bool
IsImmediate
()
const
{
return
reg_
->
is
(
UnknowRegiser
);
}
bool
IsShiftedRegister
()
const
{
return
/* reg_.IsValid() && */
(
shift_
!=
NO_SHIFT
);
}
bool
IsExtendedRegister
()
const
{
return
/* reg_.IsValid() && */
(
extend_
!=
NO_EXTEND
);
}
// =====
RegisterA64
*
reg
()
const
{
return
reg_
;
}
S64
Immediate
()
const
{
return
immediate_
;
}
Shift
shift
()
const
{
return
shift_
;
}
Extend
extend
()
const
{
return
extend_
;
}
int32_t
shift_extend_imm
()
const
{
return
shift_extent_imm_
;
}
private
:
S64
immediate_
;
RegisterA64
*
reg_
;
Shift
shift_
;
Extend
extend_
;
int32_t
shift_extent_imm_
;
};
class
MemOperand
{
public
:
inline
explicit
MemOperand
(
RegisterA64
*
base
,
int64_t
offset
=
0
,
AddrMode
addrmode
=
Offset
)
:
base_
(
base
),
regoffset_
(
&
UnknowRegiser
),
offset_
(
offset
),
addrmode_
(
addrmode
),
shift_
(
NO_SHIFT
),
extend_
(
NO_EXTEND
),
shift_extend_imm_
(
0
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
RegisterA64
*
regoffset
,
Extend
extend
,
unsigned
extend_imm
)
:
base_
(
base
),
regoffset_
(
regoffset
),
offset_
(
0
),
addrmode_
(
Offset
),
shift_
(
NO_SHIFT
),
extend_
(
extend
),
shift_extend_imm_
(
extend_imm
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
RegisterA64
*
regoffset
,
Shift
shift
=
LSL
,
unsigned
shift_imm
=
0
)
:
base_
(
base
),
regoffset_
(
regoffset
),
offset_
(
0
),
addrmode_
(
Offset
),
shift_
(
shift
),
extend_
(
NO_EXTEND
),
shift_extend_imm_
(
shift_imm
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
const
Operand
&
offset
,
AddrMode
addrmode
=
Offset
)
:
base_
(
base
),
regoffset_
(
&
UnknowRegiser
),
addrmode_
(
addrmode
)
{
if
(
offset
.
IsShiftedRegister
())
{
regoffset_
=
offset
.
reg
();
shift_
=
offset
.
shift
();
shift_extend_imm_
=
offset
.
shift_extend_imm
();
extend_
=
NO_EXTEND
;
offset_
=
0
;
}
else
if
(
offset
.
IsExtendedRegister
())
{
regoffset_
=
offset
.
reg
();
extend_
=
offset
.
extend
();
shift_extend_imm_
=
offset
.
shift_extend_imm
();
shift_
=
NO_SHIFT
;
offset_
=
0
;
}
}
const
RegisterA64
*
base
()
const
{
return
base_
;
}
const
RegisterA64
*
regoffset
()
const
{
return
regoffset_
;
}
int64_t
offset
()
const
{
return
offset_
;
}
AddrMode
addrmode
()
const
{
return
addrmode_
;
}
Shift
shift
()
const
{
return
shift_
;
}
Extend
extend
()
const
{
return
extend_
;
}
unsigned
shift_extend_imm
()
const
{
return
shift_extend_imm_
;
}
// =====
bool
IsImmediateOffset
()
const
{
return
(
addrmode_
==
Offset
);
}
bool
IsRegisterOffset
()
const
{
return
(
addrmode_
==
Offset
);
}
bool
IsPreIndex
()
const
{
return
addrmode_
==
PreIndex
;
}
bool
IsPostIndex
()
const
{
return
addrmode_
==
PostIndex
;
}
private
:
RegisterA64
*
base_
;
RegisterA64
*
regoffset_
;
int64_t
offset_
;
AddrMode
addrmode_
;
Shift
shift_
;
Extend
extend_
;
int32_t
shift_extend_imm_
;
};
template
<
typename
Inst
>
template
<
typename
Inst
>
class
A64_INST_PC_REL
:
public
InstructionA64
<
Inst
>
{
class
A64_INST_PC_REL
:
public
InstructionA64
<
Inst
>
{
...
@@ -122,7 +216,7 @@ namespace SandHook {
...
@@ -122,7 +216,7 @@ namespace SandHook {
void
assembler
()
override
;
void
assembler
()
override
;
p
rivate
:
p
ublic
:
OP
op
;
OP
op
;
RegisterA64
*
rd
;
RegisterA64
*
rd
;
int
imme
;
int
imme
;
...
@@ -184,7 +278,7 @@ namespace SandHook {
...
@@ -184,7 +278,7 @@ namespace SandHook {
return
rd
;
return
rd
;
}
}
p
rivate
:
p
ublic
:
//can be 16/32/64/128
//can be 16/32/64/128
//hw = shift / 16
//hw = shift / 16
U8
shift
;
U8
shift
;
...
@@ -230,7 +324,7 @@ namespace SandHook {
...
@@ -230,7 +324,7 @@ namespace SandHook {
void
assembler
()
override
;
void
assembler
()
override
;
p
rivate
:
p
ublic
:
OP
op
;
OP
op
;
ADDR
offset
;
ADDR
offset
;
};
};
...
@@ -262,7 +356,7 @@ namespace SandHook {
...
@@ -262,7 +356,7 @@ namespace SandHook {
void
assembler
()
override
;
void
assembler
()
override
;
p
rivate
:
p
ublic
:
OP
op
;
OP
op
;
ADDR
offset
;
ADDR
offset
;
RegisterA64
*
rt
;
RegisterA64
*
rt
;
...
@@ -289,7 +383,7 @@ namespace SandHook {
...
@@ -289,7 +383,7 @@ namespace SandHook {
void
assembler
()
override
;
void
assembler
()
override
;
p
rivate
:
p
ublic
:
Condition
condition
;
Condition
condition
;
ADDR
offset
;
ADDR
offset
;
};
};
...
@@ -321,7 +415,7 @@ namespace SandHook {
...
@@ -321,7 +415,7 @@ namespace SandHook {
void
assembler
()
override
;
void
assembler
()
override
;
p
rivate
:
p
ublic
:
OP
op
;
OP
op
;
RegisterA64
*
rt
;
RegisterA64
*
rt
;
U32
bit
;
U32
bit
;
...
@@ -366,12 +460,27 @@ namespace SandHook {
...
@@ -366,12 +460,27 @@ namespace SandHook {
void
assembler
()
override
;
void
assembler
()
override
;
p
rivate
:
p
ublic
:
OP
op
;
OP
op
;
RegisterA64
*
rt
;
RegisterA64
*
rt
;
ADDR
offset
;
ADDR
offset
;
};
class
INST_A64
(
STR_IMM
)
:
public
InstructionA64
<
STRUCT_A64
(
STR_IMM
)
>
{
public
:
A64_STR_IMM
();
A64_STR_IMM
(
A64_STRUCT_STR_IMM
*
inst
);
A64_STR_IMM
(
RegisterA64
*
rt
,
const
MemOperand
&
oprand
);
public
:
RegisterA64
*
rt
;
MemOperand
oprand
=
MemOperand
(
nullptr
);
};
};
}
}
}
}
...
...
nativehook/src/main/cpp/archs/arm64/register/register_a64.cpp
View file @
6b0d6bbf
...
@@ -14,10 +14,10 @@ RegisterA64::RegisterA64(U8 code) : Register(code) {}
...
@@ -14,10 +14,10 @@ RegisterA64::RegisterA64(U8 code) : Register(code) {}
XRegister
*
XRegister
::
registers
[
AARCH64_REGISTER_COUNT
]
=
{
XRegister
*
XRegister
::
registers
[
AARCH64_REGISTER_COUNT
]
=
{
#define DEFINE_REGISTERS(N) \
#define DEFINE_REGISTERS
_X
(N) \
&X##N,
&X##N,
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
)
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
_X
)
#undef DEFINE_REGISTERS
#undef DEFINE_REGISTERS
_X
};
};
XRegister
::
XRegister
(
U8
code
)
:
RegisterA64
(
code
)
{}
XRegister
::
XRegister
(
U8
code
)
:
RegisterA64
(
code
)
{}
...
@@ -31,10 +31,10 @@ U8 XRegister::getWide() {
...
@@ -31,10 +31,10 @@ U8 XRegister::getWide() {
WRegister
*
WRegister
::
registers
[
AARCH64_REGISTER_COUNT
]
=
{
WRegister
*
WRegister
::
registers
[
AARCH64_REGISTER_COUNT
]
=
{
#define DEFINE_REGISTERS(N) \
#define DEFINE_REGISTERS
_W
(N) \
&W##N,
&W##N,
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
)
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
_W
)
#undef DEFINE_REGISTERS
#undef DEFINE_REGISTERS
_W
};
};
WRegister
::
WRegister
(
U8
code
)
:
RegisterA64
(
code
)
{}
WRegister
::
WRegister
(
U8
code
)
:
RegisterA64
(
code
)
{}
...
...
nativehook/src/main/cpp/archs/arm64/register/register_a64.h
View file @
6b0d6bbf
...
@@ -7,17 +7,6 @@
...
@@ -7,17 +7,6 @@
#include "register.h"
#include "register.h"
// clang-format off
#define AARCH64_REGISTER_COUNT 32
#define AARCH64_REGISTER_CODE_LIST(R) \
R(0) R(1) R(2) R(3) R(4) R(5) R(6) R(7) \
R(8) R(9) R(10) R(11) R(12) R(13) R(14) R(15) \
R(16) R(17) R(18) R(19) R(20) R(21) R(22) R(23) \
R(24) R(25) R(26) R(27) R(28) R(29) R(30) R(31)
namespace
SandHook
{
namespace
SandHook
{
namespace
Asm
{
namespace
Asm
{
...
...
nativehook/src/main/cpp/archs/arm64/register/register_list_a64.cpp
0 → 100644
View file @
6b0d6bbf
//
// Created by swift on 2019/5/9.
//
#include "register_list_a64.h"
#define INIT_REGISTERS(N) \
WRegister W##N = WRegister(N); \
XRegister X##N = XRegister(N);
AARCH64_REGISTER_CODE_LIST
(
INIT_REGISTERS
)
#undef INIT_REGISTERS
WRegister
WSP
=
WRegister
(
RegisterA64
::
kSPRegInternalCode
);
XRegister
SP
=
XRegister
(
RegisterA64
::
kSPRegInternalCode
);
XRegister
IP0
=
X16
;
XRegister
IP1
=
X17
;
XRegister
LR
=
X30
;
//zero reg
XRegister
XZR
=
X31
;
WRegister
WZR
=
W31
;
RegisterA64
UnknowRegiser
=
RegisterA64
(
250
);
\ No newline at end of file
nativehook/src/main/cpp/archs/arm64/register/register_list_a64.h
View file @
6b0d6bbf
...
@@ -10,19 +10,32 @@
...
@@ -10,19 +10,32 @@
using
namespace
SandHook
::
Asm
;
using
namespace
SandHook
::
Asm
;
// clang-format off
#define AARCH64_REGISTER_COUNT 32
#define AARCH64_REGISTER_CODE_LIST(R) \
R(0) R(1) R(2) R(3) R(4) R(5) R(6) R(7) \
R(8) R(9) R(10) R(11) R(12) R(13) R(14) R(15) \
R(16) R(17) R(18) R(19) R(20) R(21) R(22) R(23) \
R(24) R(25) R(26) R(27) R(28) R(29) R(30) R(31)
#define DEFINE_REGISTERS(N) \
#define DEFINE_REGISTERS(N) \
WRegister W##N(N)
; \
extern WRegister W##N
; \
XRegister X##N(N)
;
extern XRegister X##N
;
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
)
AARCH64_REGISTER_CODE_LIST
(
DEFINE_REGISTERS
)
#undef DEFINE_REGISTERS
#undef DEFINE_REGISTERS
WRegister
WSP
(
RegisterA64
::
kSPRegInternalCode
)
;
extern
WRegister
WSP
;
XRegister
SP
(
RegisterA64
::
kSPRegInternalCode
)
;
extern
XRegister
SP
;
XRegister
IP0
=
X16
;
extern
XRegister
IP0
;
XRegister
IP1
=
X17
;
extern
XRegister
IP1
;
XRegister
LR
=
X30
;
extern
XRegister
LR
;
//zero reg
//zero reg
XRegister
XZR
=
X31
;
extern
XRegister
XZR
;
WRegister
WZR
=
W31
;
extern
WRegister
WZR
;
extern
RegisterA64
UnknowRegiser
;
#define XReg(N) XRegister::get(N)
#define WReg(N) WRegister::get(N)
#endif //SANDHOOK_NH_REGISTER_LIST_A64_H
#endif //SANDHOOK_NH_REGISTER_LIST_A64_H
nativehook/src/main/cpp/asm/register.h
View file @
6b0d6bbf
...
@@ -48,6 +48,18 @@ namespace SandHook {
...
@@ -48,6 +48,18 @@ namespace SandHook {
return
getWide
()
==
Reg128Bit
;
return
getWide
()
==
Reg128Bit
;
}
}
virtual
bool
is
(
const
Register
&
rhs
)
{
return
rhs
.
code
==
code
;
}
bool
operator
==
(
const
Register
&
rhs
)
const
{
return
code
==
rhs
.
code
;
}
bool
operator
!=
(
const
Register
&
rhs
)
const
{
return
!
(
rhs
==
*
this
);
}
private
:
private
:
U8
code
;
U8
code
;
};
};
...
...
nativehook/src/main/cpp/includes/base.h
View file @
6b0d6bbf
...
@@ -14,6 +14,11 @@ typedef uint16_t U16;
...
@@ -14,6 +14,11 @@ typedef uint16_t U16;
typedef
uint32_t
U32
;
typedef
uint32_t
U32
;
typedef
uint64_t
U64
;
typedef
uint64_t
U64
;
typedef
int8_t
S8
;
typedef
int16_t
S16
;
typedef
int32_t
S32
;
typedef
int64_t
S64
;
typedef
size_t
ADDR
;
typedef
size_t
ADDR
;
const
int
PTR_BYTE
=
sizeof
(
void
*
);
const
int
PTR_BYTE
=
sizeof
(
void
*
);
...
...
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