Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Contribute to GitLab
Sign in / Register
Toggle navigation
S
SandHook
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
Administrator
SandHook
Commits
d3ff754d
Commit
d3ff754d
authored
May 09, 2019
by
swift_gan
Committed by
swift_gan
May 09, 2019
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
tweak code
parent
6b0d6bbf
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
76 additions
and
74 deletions
+76
-74
inst_arm64.cpp
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.cpp
+14
-2
inst_arm64.h
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.h
+62
-72
No files found.
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.cpp
View file @
d3ff754d
...
...
@@ -278,10 +278,22 @@ void A64_LDR_LIT::assembler() {
// STR IMM
A64_STR_IMM
::
A64_STR_IMM
()
{}
A64_STR_IMM
::
A64_STR_IMM
(
A64_STRUCT_STR_IMM
*
inst
)
:
InstructionA64
(
inst
)
{
A64_STR_IMM
::
A64_STR_IMM
(
STRUCT_A64
(
STR_IMM
)
*
inst
)
:
InstructionA64
(
inst
)
{
decode
(
inst
);
}
A64_STR_IMM
::
A64_STR_IMM
(
RegisterA64
*
rt
,
const
MemOperand
&
op
rand
)
:
rt
(
rt
),
oprand
(
op
rand
)
{
A64_STR_IMM
::
A64_STR_IMM
(
RegisterA64
*
rt
,
const
MemOperand
&
op
erand
)
:
rt
(
rt
),
operand
(
ope
rand
)
{
assembler
();
}
AddrMode
A64_STR_IMM
::
decodeAddrMode
()
{
if
(
get
()
->
P
==
1
&&
get
()
->
W
==
0
)
{
return
Offset
;
}
else
if
(
get
()
->
P
==
0
&&
get
()
->
W
==
0
)
{
return
PostIndex
;
}
else
if
(
get
()
->
P
==
1
&&
get
()
->
W
==
1
)
{
return
PreIndex
;
}
else
{
return
NonAddrMode
;
}
}
nativehook/src/main/cpp/archs/arm64/inst/inst_arm64.h
View file @
d3ff754d
...
...
@@ -67,102 +67,79 @@ namespace SandHook {
};
enum
AddrMode
{
Offset
,
PreIndex
,
PostIndex
};
enum
AddrMode
{
Offset
,
PreIndex
,
PostIndex
,
NonAddrMode
};
class
Operand
{
public
:
inline
explicit
Operand
(
S64
imm
)
:
immediate
_
(
imm
),
reg_
(
&
UnknowRegiser
),
shift_
(
NO_SHIFT
),
extend_
(
NO_EXTEND
),
shift_extent_imm_
(
0
)
{}
:
immediate
(
imm
),
reg
(
&
UnknowRegiser
),
shift
(
NO_SHIFT
),
extend
(
NO_EXTEND
),
shift_extend_imm
(
0
)
{}
inline
Operand
(
RegisterA64
*
reg
,
Shift
shift
=
LSL
,
int32_t
imm
=
0
)
:
immediate
_
(
0
),
reg_
(
reg
),
shift_
(
shift
),
extend_
(
NO_EXTEND
),
shift_extent_imm_
(
imm
)
{}
:
immediate
(
0
),
reg
(
reg
),
shift
(
shift
),
extend
(
NO_EXTEND
),
shift_extend_imm
(
imm
)
{}
inline
Operand
(
RegisterA64
*
reg
,
Extend
extend
,
int32_t
imm
=
0
)
:
immediate
_
(
0
),
reg_
(
reg
),
shift_
(
NO_SHIFT
),
extend_
(
extend
),
shift_extent_imm_
(
imm
)
{}
:
immediate
(
0
),
reg
(
reg
),
shift
(
NO_SHIFT
),
extend
(
extend
),
shift_extend_imm
(
imm
)
{}
// =====
bool
IsImmediate
()
const
{
return
reg
_
->
is
(
UnknowRegiser
);
}
bool
IsShiftedRegister
()
const
{
return
/* reg_.IsValid() && */
(
shift_
!=
NO_SHIFT
);
}
bool
IsExtendedRegister
()
const
{
return
/* reg_.IsValid() && */
(
extend_
!=
NO_EXTEND
);
}
bool
IsImmediate
()
const
{
return
reg
->
is
(
UnknowRegiser
);
}
bool
IsShiftedRegister
()
const
{
return
(
shift
!=
NO_SHIFT
);
}
bool
IsExtendedRegister
()
const
{
return
(
extend
!=
NO_EXTEND
);
}
// =====
RegisterA64
*
reg
()
const
{
return
reg_
;
}
S64
Immediate
()
const
{
return
immediate_
;
}
Shift
shift
()
const
{
return
shift_
;
}
Extend
extend
()
const
{
return
extend_
;
}
int32_t
shift_extend_imm
()
const
{
return
shift_extent_imm_
;
}
private
:
S64
immediate_
;
RegisterA64
*
reg_
;
Shift
shift_
;
Extend
extend_
;
int32_t
shift_extent_imm_
;
public
:
S64
immediate
;
RegisterA64
*
reg
;
Shift
shift
;
Extend
extend
;
int32_t
shift_extend_imm
;
};
class
MemOperand
{
public
:
inline
explicit
MemOperand
(
RegisterA64
*
base
,
int64_t
offset
=
0
,
AddrMode
addr
mode
=
Offset
)
:
base
_
(
base
),
regoffset_
(
&
UnknowRegiser
),
offset_
(
offset
),
addrmode_
(
addrmode
),
shift_
(
NO_SHIFT
),
extend
_
(
NO_EXTEND
),
shift_extend_imm_
(
0
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
S64
offset
=
0
,
AddrMode
addr_
mode
=
Offset
)
:
base
(
base
),
reg_offset
(
&
UnknowRegiser
),
offset
(
offset
),
addr_mode
(
addr_mode
),
shift
(
NO_SHIFT
),
extend
(
NO_EXTEND
),
shift_extend_imm
(
0
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
RegisterA64
*
regoffset
,
Extend
extend
,
unsigned
extend_imm
)
:
base
_
(
base
),
regoffset_
(
regoffset
),
offset_
(
0
),
addrmode_
(
Offset
),
shift_
(
NO_SHIFT
),
extend_
(
extend
),
shift_extend_imm
_
(
extend_imm
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
RegisterA64
*
reg
_
offset
,
Extend
extend
,
unsigned
extend_imm
)
:
base
(
base
),
reg_offset
(
reg_offset
),
offset
(
0
),
addr_mode
(
Offset
),
shift
(
NO_SHIFT
),
extend
(
extend
),
shift_extend_imm
(
extend_imm
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
RegisterA64
*
regoffset
,
Shift
shift
=
LSL
,
unsigned
shift_imm
=
0
)
:
base
_
(
base
),
regoffset_
(
regoffset
),
offset_
(
0
),
addrmode_
(
Offset
),
shift_
(
shift
),
extend_
(
NO_EXTEND
),
shift_extend_imm
_
(
shift_imm
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
RegisterA64
*
reg
_
offset
,
Shift
shift
=
LSL
,
unsigned
shift_imm
=
0
)
:
base
(
base
),
reg_offset
(
reg_offset
),
offset
(
0
),
addr_mode
(
Offset
),
shift
(
shift
),
extend
(
NO_EXTEND
),
shift_extend_imm
(
shift_imm
)
{}
inline
explicit
MemOperand
(
RegisterA64
*
base
,
const
Operand
&
offset
,
AddrMode
addrmode
=
Offset
)
:
base
_
(
base
),
regoffset_
(
&
UnknowRegiser
),
addrmode_
(
addr
mode
)
{
inline
explicit
MemOperand
(
RegisterA64
*
base
,
const
Operand
&
offset
,
AddrMode
addr
_
mode
=
Offset
)
:
base
(
base
),
reg_offset
(
&
UnknowRegiser
),
addr_mode
(
addr_
mode
)
{
if
(
offset
.
IsShiftedRegister
())
{
reg
offset_
=
offset
.
reg
()
;
shift
_
=
offset
.
shift
()
;
shift_extend_imm
_
=
offset
.
shift_extend_imm
()
;
reg
_offset
=
offset
.
reg
;
shift
=
offset
.
shift
;
shift_extend_imm
=
offset
.
shift_extend_imm
;
extend
_
=
NO_EXTEND
;
offset_
=
0
;
extend
=
NO_EXTEND
;
this
->
offset
=
0
;
}
else
if
(
offset
.
IsExtendedRegister
())
{
reg
offset_
=
offset
.
reg
()
;
extend
_
=
offset
.
extend
()
;
shift_extend_imm
_
=
offset
.
shift_extend_imm
()
;
reg
_offset
=
offset
.
reg
;
extend
=
offset
.
extend
;
shift_extend_imm
=
offset
.
shift_extend_imm
;
shift
_
=
NO_SHIFT
;
offset_
=
0
;
shift
=
NO_SHIFT
;
this
->
offset
=
0
;
}
}
const
RegisterA64
*
base
()
const
{
return
base_
;
}
const
RegisterA64
*
regoffset
()
const
{
return
regoffset_
;
}
int64_t
offset
()
const
{
return
offset_
;
}
AddrMode
addrmode
()
const
{
return
addrmode_
;
}
Shift
shift
()
const
{
return
shift_
;
}
Extend
extend
()
const
{
return
extend_
;
}
unsigned
shift_extend_imm
()
const
{
return
shift_extend_imm_
;
}
// =====
bool
IsImmediateOffset
()
const
{
return
(
addr
mode_
==
Offset
);
}
bool
IsRegisterOffset
()
const
{
return
(
addr
mode_
==
Offset
);
}
bool
IsPreIndex
()
const
{
return
addr
mode_
==
PreIndex
;
}
bool
IsPostIndex
()
const
{
return
addr
mode_
==
PostIndex
;
}
bool
IsImmediateOffset
()
const
{
return
(
addr
_mode
==
Offset
);
}
bool
IsRegisterOffset
()
const
{
return
(
addr
_mode
==
Offset
);
}
bool
IsPreIndex
()
const
{
return
addr
_mode
==
PreIndex
;
}
bool
IsPostIndex
()
const
{
return
addr
_mode
==
PostIndex
;
}
p
rivate
:
RegisterA64
*
base
_
;
RegisterA64
*
reg
offset_
;
int64_t
offset_
;
AddrMode
addr
mode_
;
Shift
shift
_
;
Extend
extend
_
;
int32_t
shift_extend_imm_
;
p
ublic
:
RegisterA64
*
base
;
RegisterA64
*
reg
_offset
;
S64
offset
;
AddrMode
addr
_mode
;
Shift
shift
;
Extend
extend
;
S32
shift_extend_imm
;
};
...
...
@@ -472,13 +449,26 @@ namespace SandHook {
public
:
A64_STR_IMM
();
A64_STR_IMM
(
A64_STRUCT_STR_IMM
*
inst
);
A64_STR_IMM
(
STRUCT_A64
(
STR_IMM
)
*
inst
);
A64_STR_IMM
(
RegisterA64
*
rt
,
const
MemOperand
&
operand
);
A64_STR_IMM
(
RegisterA64
*
rt
,
const
MemOperand
&
oprand
);
DEFINE_IS
(
STR_IMM
)
AddrMode
getAddrMode
()
{
return
operand
.
addr_mode
;
}
private
:
AddrMode
decodeAddrMode
();
public
:
RegisterA64
*
rt
;
MemOperand
oprand
=
MemOperand
(
nullptr
);
MemOperand
operand
=
MemOperand
(
nullptr
);
private
:
bool
wback
;
U32
imm32
;
};
}
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment